From 0ed22a04170f3b17dc5d471b6f5a2fb68ed71f4f Mon Sep 17 00:00:00 2001 From: Ross Owen Date: Wed, 16 Mar 2016 15:21:17 +0000 Subject: [PATCH] Audio port config functions now get passed SR. Simple clock delay (falling edge) added for xCORE-slave mode when bclk >= 20MHz --- module_usb_audio/audio.xc | 4 ++-- module_usb_audio/ports/audioports.c | 4 ++-- module_usb_audio/ports/audioports.h | 8 ++++---- module_usb_audio/ports/audioports.xc | 14 +++++++++++++- 4 files changed, 21 insertions(+), 9 deletions(-) diff --git a/module_usb_audio/audio.xc b/module_usb_audio/audio.xc index de905b83..47a8cdab 100755 --- a/module_usb_audio/audio.xc +++ b/module_usb_audio/audio.xc @@ -1098,7 +1098,7 @@ chanend ?c_config, chanend ?c null, p_dsd_clk, #endif - divide, dsdMode); + divide, curSamFreq, dsdMode); } else #endif @@ -1122,7 +1122,7 @@ chanend ?c_config, chanend ?c p_bclk, #endif #endif - divide, dsdMode); + divide, curSamFreq, dsdMode); } diff --git a/module_usb_audio/ports/audioports.c b/module_usb_audio/ports/audioports.c index d5e72b03..ddd1fd3e 100644 --- a/module_usb_audio/ports/audioports.c +++ b/module_usb_audio/ports/audioports.c @@ -43,7 +43,7 @@ void ConfigAudioPortsWrapper( port p_lrclk, port p_bclk, #endif -unsigned int divide, unsigned int dsdMode) +unsigned int divide, unsigned curSamFreq, unsigned int dsdMode) { ConfigAudioPorts( #if (I2S_CHANS_DAC != 0) || (DSD_CHANS_DAC != 0) @@ -56,5 +56,5 @@ unsigned int divide, unsigned int dsdMode) #endif p_lrclk, p_bclk, - divide); + divide, curSamFreq); } diff --git a/module_usb_audio/ports/audioports.h b/module_usb_audio/ports/audioports.h index 153b28e5..fb44d455 100644 --- a/module_usb_audio/ports/audioports.h +++ b/module_usb_audio/ports/audioports.h @@ -26,7 +26,7 @@ void ConfigAudioPorts( in port p_bclk, #endif #endif - unsigned int divide); + unsigned int divide, unsigned int curSamFreq); #else void ConfigAudioPorts( @@ -49,7 +49,7 @@ void ConfigAudioPorts( port p_bclk, #endif #endif - unsigned int divide); + unsigned int divide, unsigned int curSamFreq); #endif /* __XC__*/ @@ -74,7 +74,7 @@ void ConfigAudioPortsWrapper( in port p_bclk, #endif #endif - unsigned int divide, unsigned int dsdMode); + unsigned int divide, unsigned curSamFreq, unsigned int dsdMode); #else void ConfigAudioPortsWrapper( @@ -90,7 +90,7 @@ void ConfigAudioPortsWrapper( port p_lrclk, port p_bclk, #endif - unsigned int divide, unsigned int dsdMode); + unsigned int divide, unsigned curSamFreq, unsigned int dsdMode); #endif /* __XC__*/ diff --git a/module_usb_audio/ports/audioports.xc b/module_usb_audio/ports/audioports.xc index 20188e07..3786ae8b 100644 --- a/module_usb_audio/ports/audioports.xc +++ b/module_usb_audio/ports/audioports.xc @@ -28,7 +28,7 @@ void ConfigAudioPorts( in port p_bclk, #endif #endif -unsigned int divide) +unsigned int divide, unsigned curSamFreq) { #if !defined(CODEC_MASTER) /* Note this call to stop_clock() will pause forever if the port clocking the clock-block is not low. @@ -116,6 +116,18 @@ unsigned int divide) /* Clock bclk clock-block from bclk pin */ configure_clock_src(clk_audio_bclk, p_bclk); + + /* Do some clocking shifting to get data in the valid window */ + /* E.g. Only shift when running at 88.2+ kHz TDM slave */ + int bClkDelay_fall = 0; + if(curSamFreq * I2S_CHANS_PER_FRAME * 32 >= 20000000) + { + /* 18 * 2ns = 36ns. This results in a -4ns (36 - 40) shift at 96KHz and -8ns (36 - 44) at 88.4KHz */ + bClkDelay_fall = 18; + } + + set_clock_fall_delay(clk_audio_bclk, bClkDelay_fall); + #if (I2S_CHANS_DAC != 0) /* Clock I2S output data ports from b-clock clock block */ for(int i = 0; i < I2S_WIRES_DAC; i++)