xpd: Cleaned up whitespace

This commit is contained in:
xross
2022-06-01 14:21:44 +01:00
parent 55e01e5b49
commit 206a895b74
34 changed files with 158 additions and 158 deletions

View File

@@ -3,11 +3,11 @@
/* A very simple *example* of a USB audio application (and as such is un-verified for production)
*
* It uses the main blocks from the lib_xua
* It uses the main blocks from the lib_xua
*
* - 2 in/ 2 out I2S only
* - No DFU
* - I2S only
* - I2S only
*
*/
@@ -31,7 +31,7 @@ in port p_for_mclk_count = PORT_MCLK_COUNT; /* Extra port for count
in port p_mclk_in_usb = PORT_MCLK_IN_USB; /* Extra master clock input for the USB tile */
/* Clock-block declarations */
clock clk_audio_bclk = on tile[0]: XS1_CLKBLK_4; /* Bit clock */
clock clk_audio_bclk = on tile[0]: XS1_CLKBLK_4; /* Bit clock */
clock clk_audio_mclk = on tile[0]: XS1_CLKBLK_5; /* Master clock */
clock clk_audio_mclk_usb = on tile[1]: XS1_CLKBLK_1; /* Master clock for USB tile */
@@ -51,17 +51,17 @@ int main()
/* Channel for audio data between buffering cores and AudioHub/IO core */
chan c_aud;
/* Channel for communicating control messages from EP0 to the rest of the device (via the buffering cores) */
chan c_aud_ctl;
par
{
/* Low level USB device layer core */
/* Low level USB device layer core */
on tile[1]: XUD_Main(c_ep_out, 2, c_ep_in, 2,
c_sof, epTypeTableOut, epTypeTableIn,
c_sof, epTypeTableOut, epTypeTableIn,
XUD_SPEED_HS, XUD_PWR_SELF);
/* Endpoint 0 core from lib_xua */
/* Note, since we are not using many features we pass in null for quite a few params.. */
on tile[1]: XUA_Endpoint0(c_ep_out[0], c_ep_in[0], c_aud_ctl, null, null, null, null);
@@ -69,7 +69,7 @@ int main()
/* Buffering cores - handles audio data to/from EP's and gives/gets data to/from the audio I/O core */
/* Note, this spawns two cores */
on tile[1]: {
/* Connect master-clock clock-block to clock-block pin */
set_clock_src(clk_audio_mclk_usb, p_mclk_in_usb); /* Clock clock-block from mclk pin */
set_port_clock(p_for_mclk_count, clk_audio_mclk_usb); /* Clock the "count" port from the clock block */
@@ -82,7 +82,7 @@ int main()
/* AudioHub/IO core does most of the audio IO i.e. I2S (also serves as a hub for all audio) */
on tile[0]: XUA_AudioHub(c_aud, clk_audio_mclk, clk_audio_bclk, p_mclk_in, p_lrclk, p_bclk, p_i2s_dac, p_i2s_adc);
}
return 0;
}

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@@ -127,7 +127,7 @@ static USB_HID_Report_Element_t* const hidConfigurableElements[] = {
};
/*
* List HID Reports, one per Report ID. This should be a usage page item with the relevant
* List HID Reports, one per Report ID. This should be a usage page item with the relevant
* If not using report IDs - still have one with report ID 0
*/
static const USB_HID_Report_Element_t* const hidReports[] = {

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@@ -50,7 +50,7 @@ void AudioHwConfig2(unsigned samFreq, unsigned mClk, unsigned dsdMode, unsigned
delay_microseconds(20000);
/* Take ADC out of reset */
gpioVal |= P_GPIO_ADC_RST_N;
gpioVal |= P_GPIO_ADC_RST_N;
p_gpio <: gpioVal;
/* Configure ADC for I2S slave mode via I2C */
@@ -58,7 +58,7 @@ void AudioHwConfig2(unsigned samFreq, unsigned mClk, unsigned dsdMode, unsigned
dif = 0x01; /* I2S */
mode = 0x03; /* Slave mode all speeds */
/* Reg 0x01: (GCTL) Global Mode Control Register
/* Reg 0x01: (GCTL) Global Mode Control Register
* Bit[7]: CP-EN: Manages control-port mode
* Bit[6]: CLKMODE: Setting puts part in 384x mode
* Bit[5:4]: MDIV[1:0]: Set to 01 for /2
@@ -91,7 +91,7 @@ void AudioHwConfig2(unsigned samFreq, unsigned mClk, unsigned dsdMode, unsigned
* bit[0] : Power Down (PDN) : Powered down
*/
DAC_REGWRITE(CS4384_MODE_CTRL, 0b11000001);
/* PCM Control (Address: 0x03) */
/* bit[7:4] : Digital Interface Format (DIF) : 0b0001 for I2S up to 24bit
* bit[3:2] : Reserved

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@@ -1,7 +1,7 @@
// Copyright 2017-2021 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1.
#ifndef _XUA_CONF_H_
#ifndef _XUA_CONF_H_
#define _XUA_CONF_H_
#define NUM_USB_CHAN_OUT 2 /* Number of channels from host to device */
@@ -19,7 +19,7 @@
#define VENDOR_ID 0x20B1
#define PRODUCT_STR_A2 "XUA Example"
#define PRODUCT_STR_A1 "XUA Example"
#define PID_AUDIO_1 1
#define PID_AUDIO_1 1
#define PID_AUDIO_2 2
#define XUA_DFU_EN 0 /* Disable DFU (for simplicity of example */
#define MIC_DUAL_ENABLED 0 // Use multi-threaded design

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@@ -3,7 +3,7 @@
/* A very simple *example* of a USB audio application (and as such is un-verified for production)
*
* It uses the main blocks from the lib_xua
* It uses the main blocks from the lib_xua
*
* - S/PDIF output only
* - No DFU
@@ -51,7 +51,7 @@ int main()
/* Channel for audio data between buffering cores and AudioHub/IO core */
chan c_aud;
/* Channel for communicating control messages from EP0 to the rest of the device (via the buffering cores) */
chan c_aud_ctl;
@@ -60,9 +60,9 @@ int main()
par
{
/* Low level USB device layer core */
/* Low level USB device layer core */
on tile[1]: XUD_Main(c_ep_out, 2, c_ep_in, 2, c_sof, epTypeTableOut, epTypeTableIn, XUD_SPEED_HS, XUD_PWR_SELF);
/* Endpoint 0 core from lib_xua */
/* Note, since we are not using many features we pass in null for quite a few params.. */
on tile[1]: XUA_Endpoint0(c_ep_out[0], c_ep_in[0], c_aud_ctl, null, null, null, null);
@@ -70,7 +70,7 @@ int main()
/* Buffering cores - handles audio data to/from EP's and gives/gets data to/from the audio I/O core */
/* Note, this spawns two cores */
on tile[1]: {
/* Connect master-clock clock-block to clock-block pin */
set_clock_src(clk_audio_mclk_usb, p_mclk_in_usb); /* Clock clock-block from mclk pin */
set_port_clock(p_for_mclk_count, clk_audio_mclk_usb); /* Clock the "count" port from the clock block */
@@ -78,28 +78,28 @@ int main()
XUA_Buffer(c_ep_out[1], c_ep_in[1], c_sof, c_aud_ctl, p_for_mclk_count, c_aud);
}
/* AudioHub() (I2S) and S/SPDIF Tx are on the same tile */
on tile[0]: {
/* Setup S/PDIF tx port from clock etc - note we do this before par to avoid parallel usage */
spdif_tx_port_config(p_spdif_tx, clk_spdif_tx, p_mclk_in, 7);
par
{
while(1)
{
/* Run the S/PDIF transmitter task */
spdif_tx(p_spdif_tx, c_spdif_tx);
spdif_tx(p_spdif_tx, c_spdif_tx);
}
/* AudioHub/IO core does most of the audio IO i.e. I2S (also serves as a hub for all audio) */
/* Note, since we are not using I2S we pass in null for LR and Bit clock ports and the I2S dataline ports */
XUA_AudioHub(c_aud, clk_audio_mclk, null, p_mclk_in, null, null, null, null, c_spdif_tx);
}
}
}
return 0;
}

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@@ -127,7 +127,7 @@ static USB_HID_Report_Element_t* const hidConfigurableElements[] = {
};
/*
* List HID Reports, one per Report ID. This should be a usage page item with the relevant
* List HID Reports, one per Report ID. This should be a usage page item with the relevant
* If not using report IDs - still have one with report ID 0
*/
static const USB_HID_Report_Element_t* const hidReports[] = {

View File

@@ -1,7 +1,7 @@
// Copyright 2017-2021 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1.
#ifndef _XUA_CONF_H_
#ifndef _XUA_CONF_H_
#define _XUA_CONF_H_
#define NUM_USB_CHAN_OUT 2

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@@ -3,7 +3,7 @@
/* A very simple *example* of a USB audio application (and as such is un-verified for production)
*
* It uses the main blocks from the lib_xua with the addition of PDM mic support using lib_mic_array
* It uses the main blocks from the lib_xua with the addition of PDM mic support using lib_mic_array
*
* - No DFU
*
@@ -24,7 +24,7 @@ in port p_pdm_mclk = PORT_PDM_MCLK; /* Master clock f
in buffered port:32 p_pdm_mics = PORT_PDM_DATA; /* Port for PDM mic data */
clock clk_pdm = on tile[0]: XS1_CLKBLK_1; /* Clock-block for PDM mics */
clock clk_pdm = on tile[0]: XS1_CLKBLK_1; /* Clock-block for PDM mics */
/* Lib_xua port declarations. Note, the defines come from the xn file */
@@ -52,7 +52,7 @@ int main()
/* Channel for audio data between buffering cores and AudioHub/IO core */
chan c_aud;
/* Channel for communicating control messages from EP0 to the rest of the device (via the buffering cores) */
chan c_aud_ctl;
@@ -64,26 +64,26 @@ int main()
par
{
/* Low level USB device layer core */
/* Low level USB device layer core */
on tile[1]: XUD_Main(c_ep_out, 2, c_ep_in, 2, c_sof, epTypeTableOut, epTypeTableIn, XUD_SPEED_HS, XUD_PWR_BUS);
/* Endpoint 0 core from lib_xua */
/* Note, since we are not using many features we pass in null for quite a few params.. */
on tile[1]: XUA_Endpoint0(c_ep_out[0], c_ep_in[0], c_aud_ctl, null, null, null, null);
on tile[1]:
on tile[1]:
{
/* Connect master-clock clock-block to clock-block pin */
set_clock_src(clk_audio_mclk, p_mclk_in); /* Clock clock-block from mclk pin */
set_port_clock(p_for_mclk_count, clk_audio_mclk); /* Clock the "count" port from the clock block */
/* Note, AudioHub() will start the clock */
par
{
/* Buffering task - handles audio data to/from EP's and gives/gets data to/from the audio I/O core */
/* Note, this spawns two cores */
XUA_Buffer(c_ep_out[1], c_ep_in[1], c_sof, c_aud_ctl, p_for_mclk_count, c_aud);
/* AudioHub/IO core does most of the audio IO i.e. I2S (also serves as a hub for all audio) */
/* Note, since we are not using I2S we pass in null for LR and Bit clock ports and the I2S dataline ports */
XUA_AudioHub(c_aud, clk_audio_mclk, null, p_mclk_in, null, null, null, null, c_mic_pcm);
@@ -105,7 +105,7 @@ int main()
{
/* PDM receive I/O task */
mic_array_pdm_rx(p_pdm_mics, c_4x_pdm_mic_0, c_4x_pdm_mic_1);
/* Run two decimator tasks for 8 mics */
mic_array_decimate_to_pcm_4ch(c_4x_pdm_mic_0, c_ds_output[0], MIC_ARRAY_NO_INTERNAL_CHANS);
mic_array_decimate_to_pcm_4ch(c_4x_pdm_mic_1, c_ds_output[1], MIC_ARRAY_NO_INTERNAL_CHANS);
@@ -114,7 +114,7 @@ int main()
}
}
}
return 0;
}

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@@ -16,7 +16,7 @@ void AudioHwInit()
/* DAC in reset */
p_gpio <: 0;
return;
return;
}
/* Configures the external audio hardware for the required sample frequency */

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@@ -127,7 +127,7 @@ static USB_HID_Report_Element_t* const hidConfigurableElements[] = {
};
/*
* List HID Reports, one per Report ID. This should be a usage page item with the relevant
* List HID Reports, one per Report ID. This should be a usage page item with the relevant
* If not using report IDs - still have one with report ID 0
*/
static const USB_HID_Report_Element_t* const hidReports[] = {

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@@ -1,7 +1,7 @@
// Copyright 2017-2021 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1.
#ifndef _XUA_CONF_H_
#ifndef _XUA_CONF_H_
#define _XUA_CONF_H_
#define NUM_USB_CHAN_OUT 0