- Rename app_test_i2s_loopback to test_i2s_loopback

- Port test_i2s_loopback from xmostest to pytest and test_support

.gitignore

@@ -23,6 +23,7 @@ _build*
 **/.vscode/**
 **.egg-info
 *.pdf
+*/logs/*
 
 # waf build files
 .lock-waf_*

tests/conftest.py

@@ -0,0 +1,9 @@
+import pytest
+
+def pytest_addoption(parser):
+    parser.addoption("--enabletracing", action="store_true", default=False, help="Enable xsim tracing")
+
+
+@pytest.fixture
+def options(request):
+    yield request.config.option

tests/test_i2s_loopback.py

@@ -1,51 +1,147 @@
-#!/usr/bin/env python
-# Copyright 2018-2021 XMOS LIMITED.
-# This Software is subject to the terms of the XMOS Public Licence: Version 1.
-import xmostest
+import pytest
+import Pyxsim
+from Pyxsim import testers
+import os
+import sys
 
-def runtest_one_config(env, format, i2s_role, num_chans_in, num_chans_out, sample_rate):
-    testlevel = 'smoke'
-    resources = xmostest.request_resource('xsim')
 
-    binary = 'app_test_i2s_loopback/bin/{env}_{format}_{i2s_role}_{num_chans_in}in_{num_chans_out}out_{sample_rate}/app_test_i2s_loopback_{env}_{format}_{i2s_role}_{num_chans_in}in_{num_chans_out}out_{sample_rate}.xe'.format(env=env, format=format, i2s_role=i2s_role, num_chans_in=num_chans_in, num_chans_out=num_chans_out, sample_rate=sample_rate)
-    tester = xmostest.ComparisonTester(open('pass.expect'),
-                                       'lib_xua',
-                                       'i2s_loopback_sim_tests',
-                                       'i2s_loopback',
-                                       {'env':env,
-                                        'format':format,
-                                        'i2s_role':i2s_role,
-                                        'num_chans_in':num_chans_in,
-                                        'num_chans_out':num_chans_out,
-                                        'sample_rate':sample_rate})
-    tester.set_min_testlevel(testlevel)
-    loopback_args=              '-port tile[0] XS1_PORT_1M 1 0 -port tile[0] XS1_PORT_1I 1 0 ' + \
-                                '-port tile[0] XS1_PORT_1N 1 0 -port tile[0] XS1_PORT_1J 1 0 ' + \
-                                '-port tile[0] XS1_PORT_1O 1 0 -port tile[0] XS1_PORT_1K 1 0 ' + \
-                                '-port tile[0] XS1_PORT_1P 1 0 -port tile[0] XS1_PORT_1L 1 0 ' + \
-                                '-port tile[0] XS1_PORT_1A 1 0 -port tile[0] XS1_PORT_1F 1 0 '
-    if i2s_role == 'slave':
-        loopback_args += '-port tile[0] XS1_PORT_1B 1 0 -port tile[0] XS1_PORT_1H 1 0 '   #bclk
-        loopback_args += '-port tile[0] XS1_PORT_1C 1 0 -port tile[0] XS1_PORT_1G 1 0 '   #lrclk
+@pytest.fixture()
+def test_file(request):
+    return str(request.node.fspath)
+
+
+def create_if_needed(folder):
+    if not os.path.exists(folder):
+        os.makedirs(folder)
+    return folder
+
+
+def get_sim_args(testname, desc, options):
+    sim_args = []
+
+    if options.enabletracing:
+        log_folder = create_if_needed("logs")
+
+        filename = "{log}/xsim_trace_{test}_{desc}".format(
+            log=log_folder,
+            test=testname,
+            desc=desc,
+        )
+
+        sim_args += [
+            "--trace-to",
+            "{0}.txt".format(filename),
+            "--enable-fnop-tracing",
+        ]
+
+        vcd_args = "-o {0}.vcd".format(filename)
+        vcd_args += (
+            " -tile tile[0] -ports -ports-detailed -instructions"
+            " -functions -cycles -clock-blocks -pads -cores -usb"
+        )
+
+        sim_args += ["--vcd-tracing", vcd_args]
+
+    return sim_args
+
+
+def run_on_simulator(xe, simthreads, **kwargs):
+    for k in ["do_xe_prebuild", "build_env", "clean_before_build"]:
+        if k in kwargs:
+            kwargs.pop(k)
+
+    Pyxsim.run_with_pyxsim(xe, simthreads, **kwargs)
+
+
+def do_test(pcm_format, i2s_role, channel_count, sample_rate, test_file, capfd, options):
+
+    build_options = []
+    output = []
+    testname, _ = os.path.splitext(os.path.basename(test_file))
+
+    desc = f"simulation_{pcm_format}_{i2s_role}_{channel_count}in_{channel_count}out_{sample_rate}"
+    binary = f"{testname}/bin/{desc}/{testname}_{desc}.xe"
+
+    build_success, _ = Pyxsim._build(
+        binary, do_clean=False, build_options=build_options
+    )
+
+    if build_success:
+
+        tester = testers.ComparisonTester(
+            open("pass.expect"),
+            "lib_xua",
+            "xua_sim_tests",
+            testname,
+            {
+                "speed": "500MHz",
+                "arch": "XS2",
+            },  # TODO run tests on XS3 and other core freqs
+        )
+
+        loopback_args = (
+            "-port tile[0] XS1_PORT_1M 1 0 -port tile[0] XS1_PORT_1I 1 0 "
+            + "-port tile[0] XS1_PORT_1N 1 0 -port tile[0] XS1_PORT_1J 1 0 "
+            + "-port tile[0] XS1_PORT_1O 1 0 -port tile[0] XS1_PORT_1K 1 0 "
+            + "-port tile[0] XS1_PORT_1P 1 0 -port tile[0] XS1_PORT_1L 1 0 "
+            + "-port tile[0] XS1_PORT_1A 1 0 -port tile[0] XS1_PORT_1F 1 0 "
+        )
+        if i2s_role == "slave":
+            loopback_args += (
+                "-port tile[0] XS1_PORT_1B 1 0 -port tile[0] XS1_PORT_1H 1 0 "  # bclk
+            )
+            loopback_args += (
+                "-port tile[0] XS1_PORT_1C 1 0 -port tile[0] XS1_PORT_1G 1 0 "  # lrclk
+            )
 
         max_cycles = 1500000  # enough to reach the 10 skip + 100 test in sim at 48kHz
-    xmostest.run_on_simulator(resources['xsim'], binary, tester=tester, simargs=['--max-cycles', str(max_cycles), '--plugin', 'LoopbackPort.dll', loopback_args])
 
-def runtest():
-    runtest_one_config('simulation', 'i2s', 'master', 2, 2, '48khz')
-    runtest_one_config('simulation', 'i2s', 'slave', 2, 2, '48khz')
+        simargs = get_sim_args(testname, desc, options)
+        simargs = simargs + [
+            "--max-cycles",
+            str(max_cycles),
+            "--plugin",
+            "LoopbackPort.dll",
+            loopback_args,
+        ]
 
-    runtest_one_config('simulation', 'i2s', 'master', 2, 2, '192khz')
-    runtest_one_config('simulation', 'i2s', 'slave', 2, 2, '192khz')
+        simthreads = []
+        run_on_simulator(binary, simthreads, simargs=simargs)
 
-    runtest_one_config('simulation', 'i2s', 'master', 8, 8, '48khz')
-    runtest_one_config('simulation', 'i2s', 'slave', 8, 8, '48khz')
+        cap_output, err = capfd.readouterr()
+        output.append(cap_output.split("\n"))
 
-    runtest_one_config('simulation', 'i2s', 'master', 8, 8, '192khz')
-    runtest_one_config('simulation', 'i2s', 'slave', 8, 8, '192khz')
+        sys.stdout.write("\n")
 
-    runtest_one_config('simulation', 'tdm', 'master', 8, 8, '48khz')
-    runtest_one_config('simulation', 'tdm', 'slave', 8, 8, '48khz')
+        results = Pyxsim.run_tester(output, [tester])
 
-    runtest_one_config('simulation', 'tdm', 'master', 16, 16, '48khz')
-    runtest_one_config('simulation', 'tdm', 'slave', 16, 16, '48khz')
+        return results
+
+    else:
+        print("Build Failed")
+
+    return [False]
+
+
+@pytest.mark.parametrize("i2s_role", ["master", "slave"])
+@pytest.mark.parametrize("pcm_format", ["i2s", "tdm"])
+@pytest.mark.parametrize("channel_count", [2, 8, 16])
+@pytest.mark.parametrize("sample_rate", ["48khz", "192khz"])
+def test_i2s_loopback(
+    i2s_role, pcm_format, channel_count, sample_rate, test_file, capfd, options
+):
+
+    if pcm_format == "i2s" and channel_count == 16:
+        pytest.skip("Invalid parameter combination")
+
+    if pcm_format == "tdm" and channel_count == 2:
+        pytest.skip("Invalid parameter combination")
+
+    if pcm_format == "tdm" and sample_rate == "192khz":
+        pytest.skip("Invalid parameter combination")
+
+    results = do_test(
+        pcm_format, i2s_role, channel_count, sample_rate, test_file, capfd, options
+    )
+
+    assert results[0]

tests/test_i2s_loopback/main.xc

@@ -203,7 +203,7 @@ void slave_mode_clk_setup(const unsigned samFreq, const unsigned chans_per_frame
 
 #endif
 
-#if I2S_MODE_TDM
+#if XUA_PCM_FORMAT == XUA_PCM_FORMAT_TDM
 const int i2s_tdm_mode = 8;
 #else
 const int i2s_tdm_mode = 2;

tests/test_i2s_loopback/xua_conf.h

@@ -1,17 +1,24 @@
-// Copyright 2016-2021 XMOS LIMITED.
+// Copyright 2016-2022 XMOS LIMITED.
 // This Software is subject to the terms of the XMOS Public Licence: Version 1.
-#ifndef __custom_defines_h__
-#define __custom_defines_h__
+#ifndef _XUA_CONF_H_
+#define _XUA_CONF_H_
 
 #define EXCLUDE_USB_AUDIO_MAIN
 #define XUA_NUM_PDM_MICS 0
 #define XUD_TILE 1
 #define AUDIO_IO_TILE 0
 #define MIXER 0
+
+#ifndef MCLK_441
 #define MCLK_441 (512 * 44100)
+#endif
+
+#ifndef MCLK_48
 #define MCLK_48 (512 * 48000)
-#define MIN_FREQ 44100
-#define MAX_FREQ 192000
+#endif
+
+#define MIN_FREQ (44100)
+#define MAX_FREQ (192000)
 #define SPDIF_TX_INDEX 0
 #define VENDOR_STR "XMOS"
 #define VENDOR_ID 0x20B1
@@ -26,4 +33,4 @@
 #define MIC_DUAL_ENABLED 1        //Use single thread, dual PDM mic
 #define XUA_MIC_FRAME_SIZE 240
 
-#endif // __custom_defines_h__
+#endif