diff --git a/examples/xua_lite_example/src/app_xua_lite.xc b/examples/xua_lite_example/src/app_xua_lite.xc index 2616914a..64830667 100644 --- a/examples/xua_lite_example/src/app_xua_lite.xc +++ b/examples/xua_lite_example/src/app_xua_lite.xc @@ -21,13 +21,13 @@ #define DEBUG_PRINT_ENABLE_XUA_APP 1 #include "debug_print.h" -// Port declarations. Note, the defines come from the xn file +// Port declarations. Note, the defines come from the xn file on tile[0]: buffered out port:32 p_i2s_dac[] = {XS1_PORT_1N}; //DAC on tile[0]: buffered in port:32 p_i2s_adc[] = {XS1_PORT_1F}; //Unused currently -on tile[0]: buffered out port:32 p_lrclk = XS1_PORT_1O; //I2S Bit-clock -on tile[0]: out port p_bclk = XS1_PORT_1P; //I2S L/R-clock +on tile[0]: buffered out port:32 p_lrclk = XS1_PORT_1O; //I2S Bit-clock +on tile[0]: out port p_bclk = XS1_PORT_1P; //I2S L/R-clock -// Master clock for the audio IO tile +// Master clock for the audio IO tile on tile[0]: in port p_mclk_in = XS1_PORT_1K; // [0] : DAC_RESET_N @@ -39,12 +39,12 @@ on tile[0]: out port p_gpio = XS1_PORT_4D; on tile[1]: port p_scl = XS1_PORT_1C; on tile[1]: port p_sda = XS1_PORT_1D; on tile[1]: in port p_mclk_in_usb = XS1_PORT_1A; -on tile[1]: in port p_for_mclk_count= XS1_PORT_16A; // Extra port for counting master clock ticks -on tile[1]: clock clk_usb_mclk = XS1_CLKBLK_3; // Master clock +on tile[1]: in port p_for_mclk_count= XS1_PORT_16A; // Extra port for counting master clock ticks +on tile[1]: clock clk_usb_mclk = XS1_CLKBLK_3; // Master clock -// Clock-block declarations -on tile[0]: clock clk_audio_bclk = XS1_CLKBLK_2; // Bit clock -on tile[0]: clock clk_audio_mclk = XS1_CLKBLK_3; // Master clock +// Clock-block declarations +on tile[0]: clock clk_audio_bclk = XS1_CLKBLK_2; // Bit clock +on tile[0]: clock clk_audio_mclk = XS1_CLKBLK_3; // Master clock //XUD uses XS1_CLKBLK_4, XS1_CLKBLK_5 on tile[1] //Mic array resources @@ -56,7 +56,7 @@ on tile[0]: clock pdmclk6 = XS1_CLKBLK_5; // Endpoint type tables - informs XUD what the transfer types for each Endpoint in use and also -// if the endpoint wishes to be informed of USB bus resets +// if the endpoint wishes to be informed of USB bus resets XUD_EpType epTypeTableOut[] = {XUD_EPTYPE_CTL | XUD_STATUS_ENABLE, XUD_EPTYPE_ISO}; XUD_EpType epTypeTableIn[] = {XUD_EPTYPE_CTL | XUD_STATUS_ENABLE, XUD_EPTYPE_ISO, XUD_EPTYPE_ISO}; @@ -72,11 +72,11 @@ void burn_high_priority(void){ int main() { - // Channels for lib_xud + // Channels for lib_xud chan c_ep_out[XUA_ENDPOINT_COUNT_OUT]; chan c_ep_in[XUA_ENDPOINT_COUNT_IN]; - // Channel for communicating SOF notifications from XUD to the Buffering cores + // Channel for communicating SOF notifications from XUD to the Buffering cores chan c_sof; interface i2s_frame_callback_if i_i2s; @@ -94,7 +94,7 @@ int main() setup_audio_gpio(p_gpio); c_audio <: 0; //Signal that we can now do i2c setup c_audio :> int _; //Now wait until i2c has finished mclk setup - + const unsigned micDiv = MCLK_48/3072000; mic_array_setup_ddr(pdmclk, pdmclk6, p_mclk_in, p_pdm_clk, p_pdm_mics, micDiv); @@ -109,9 +109,9 @@ int main() } on tile[1]:unsafe{ // Connect master-clock input clock-block to clock-block pin for asnch feedback calculation - set_clock_src(clk_usb_mclk, p_mclk_in_usb); // Clock clock-block from mclk pin - set_port_clock(p_for_mclk_count, clk_usb_mclk); // Clock the "count" port from the clock block - start_clock(clk_usb_mclk); // Set the clock off running + set_clock_src(clk_usb_mclk, p_mclk_in_usb); // Clock clock-block from mclk pin + set_port_clock(p_for_mclk_count, clk_usb_mclk); // Clock the "count" port from the clock block + start_clock(clk_usb_mclk); // Set the clock off running //Setup DAC over i2c and then return so we do not use a thread c_audio :> int _; //Wait for reset to be asserted/deasserted by other tile @@ -121,14 +121,14 @@ int main() } c_audio <: 0; //Signal to tile[0] that mclk is now good - par{ - // Low level USB device layer core + par { + // Low level USB device layer core XUD_Main(c_ep_out, XUA_ENDPOINT_COUNT_OUT, c_ep_in, XUA_ENDPOINT_COUNT_IN, - c_sof, epTypeTableOut, epTypeTableIn, - null, null, -1 , + c_sof, epTypeTableOut, epTypeTableIn, + null, null, -1 , (AUDIO_CLASS == 1) ? XUD_SPEED_FS : XUD_SPEED_HS, XUD_PWR_BUS); - // // Buffering core - handles audio and control data to/from EP's and gives/gets data to/from the audio I/O core + // // Buffering core - handles audio and control data to/from EP's and gives/gets data to/from the audio I/O core // XUA_Buffer_lite(c_ep_out[0], // c_ep_in[0], // c_ep_out[1], @@ -150,7 +150,7 @@ int main() } }//Tile[1] par }//Top level par - + return 0; } diff --git a/examples/xua_lite_example/src/audio_config.xc b/examples/xua_lite_example/src/audio_config.xc index 9e1dcb82..3235387d 100755 --- a/examples/xua_lite_example/src/audio_config.xc +++ b/examples/xua_lite_example/src/audio_config.xc @@ -98,21 +98,21 @@ void AudioHwConfigure(unsigned samFreq, client i2c_master_if i_i2c) // Wait for 2ms because we apply reset for 1ms from other tile delay_milliseconds(2); - + // Set register page to 0 DAC3101_REGWRITE(DAC3101_PAGE_CTRL, 0x00); // Initiate SW reset (PLL is powered off as part of reset) DAC3101_REGWRITE(DAC3101_SW_RST, 0x01); - + // so I've got 24MHz in to PLL, I want 24.576MHz or 22.5792MHz out. - + // I will always be using fractional-N (D != 0) so we must set R = 1 // PLL_CLKIN/P must be between 10 and 20MHz so we must set P = 2 - + // PLL_CLK = CLKIN * ((RxJ.D)/P) // We know R = 1, P = 2. // PLL_CLK = CLKIN * (J.D / 2) - + // For 24.576MHz: // J = 8 // D = 1920 @@ -125,7 +125,7 @@ void AudioHwConfigure(unsigned samFreq, client i2c_master_if i_i2c) // DAC_CLK = PLL_CLK / 4 = 24.576MHz. // DAC_MOD_CLK = DAC_CLK / 4 = 6.144MHz. // DAC_FS = DAC_MOD_CLK / 128 = 48kHz. - + // For 22.5792MHz: // J = 7 // D = 5264 @@ -153,10 +153,10 @@ void AudioHwConfigure(unsigned samFreq, client i2c_master_if i_i2c) DAC3101_REGWRITE(DAC3101_PLL_D_LSB, 0x00); delay_milliseconds(1); - + // Set PLL_CLKIN = BCLK (device pin), CODEC_CLKIN = PLL_CLK (generated on-chip) DAC3101_REGWRITE(DAC3101_CLK_GEN_MUX, 0x07); - + // Set PLL P=1 and R=4 values and power up. DAC3101_REGWRITE(DAC3101_PLL_P_R, 0x94); // Set NDAC clock divider to 4 and power up. @@ -197,10 +197,10 @@ void AudioHwConfigure(unsigned samFreq, client i2c_master_if i_i2c) } delay_milliseconds(1); - + // Set PLL_CLKIN = MCLK (device pin), CODEC_CLKIN = PLL_CLK (generated on-chip) DAC3101_REGWRITE(DAC3101_CLK_GEN_MUX, 0x03); - + // Set PLL P and R values and power up. DAC3101_REGWRITE(DAC3101_PLL_P_R, 0xA1); // Set NDAC clock divider to 4 and power up. @@ -218,7 +218,7 @@ void AudioHwConfigure(unsigned samFreq, client i2c_master_if i_i2c) DAC3101_REGWRITE(DAC3101_CLKOUT_M_VAL, 0x81); // Set GPIO1 output to come from CLKOUT output. DAC3101_REGWRITE(DAC3101_GPIO1_IO, 0x10); - + // Set CODEC interface mode: I2S, 24 bit, slave mode (BCLK, WCLK both inputs). DAC3101_REGWRITE(DAC3101_CODEC_IF, 0x20); // Set register page to 1 @@ -253,7 +253,7 @@ void AudioHwConfigure(unsigned samFreq, client i2c_master_if i_i2c) DAC3101_REGWRITE(DAC3101_SPKL_VOL_A, 0x92); // Enable Right Class-D output analog volume, set = -9 dB DAC3101_REGWRITE(DAC3101_SPKR_VOL_A, 0x92); - + delay_milliseconds(100); // Power up DAC @@ -269,11 +269,11 @@ void AudioHwConfigure(unsigned samFreq, client i2c_master_if i_i2c) // Unmute digital volume control // Unmute DAC left and right channels DAC3101_REGWRITE(DAC3101_DAC_VOL, 0x00); - + i_i2c.shutdown(); } //These are here just to silence compiler warnings about unimplemented xua callbacks (not needed in xua lite) void AudioHwInit(){} -void AudioHwConfig(unsigned samFreq, unsigned mClk, unsigned dsdMode, unsigned sampRes_DAC, unsigned sampRes_ADC){} \ No newline at end of file +void AudioHwConfig(unsigned samFreq, unsigned mClk, unsigned dsdMode, unsigned sampRes_DAC, unsigned sampRes_ADC){} diff --git a/examples/xua_lite_example/src/audio_hub.xc b/examples/xua_lite_example/src/audio_hub.xc index 06fd32dc..668ed033 100644 --- a/examples/xua_lite_example/src/audio_hub.xc +++ b/examples/xua_lite_example/src/audio_hub.xc @@ -35,6 +35,8 @@ void AudioHub(server i2s_frame_callback_if i2s, mic_array_decimator_configure(c_ds_output, decimatorCount, dc); mic_array_init_time_domain_frame(c_ds_output, decimatorCount, buffer, mic_audio_frame, dc); + UserBufferManagementInit(); + // Used for debug //int saw = 0; @@ -61,6 +63,8 @@ void AudioHub(server i2s_frame_callback_if i2s, restart = I2S_NO_RESTART; // Keep on looping timer tmr; int t0, t1; tmr :> t0; + UserBufferManagement((unsigned *) raw_mics, (unsigned *) samples_out); + //Transfer samples. Takes about 25 ticks for (int i = 0; i < NUM_USB_CHAN_OUT; i++) c_audio :> samples_out[i]; if (XUA_ADAPTIVE) c_audio :> clock_nudge; diff --git a/examples/xua_lite_example/src/fifo_impl.h b/examples/xua_lite_example/src/fifo_impl.h index 32c297dd..080f3c95 100644 --- a/examples/xua_lite_example/src/fifo_impl.h +++ b/examples/xua_lite_example/src/fifo_impl.h @@ -112,7 +112,7 @@ static inline fifo_ret_t fifo_block_push_short_fast(volatile mem_fifo_short_t * memcpy(&fifo->data_base_ptr[fifo->write_idx], &data[0], first_block_size * sizeof(short)); fifo->write_idx += first_block_size; } - + return FIFO_SUCCESS; } } @@ -181,7 +181,7 @@ static inline fifo_ret_t fifo_block_pop_short_fast(volatile mem_fifo_short_t * u // printf("no wrap\n"); } - + return FIFO_SUCCESS; } } @@ -203,4 +203,4 @@ static inline int fifo_get_fill_relative_half_short(volatile mem_fifo_short_t * return fifo_fill; } } -#endif \ No newline at end of file +#endif diff --git a/examples/xua_lite_example/src/fifo_types.h b/examples/xua_lite_example/src/fifo_types.h index 5bc5248a..af7994e7 100644 --- a/examples/xua_lite_example/src/fifo_types.h +++ b/examples/xua_lite_example/src/fifo_types.h @@ -15,7 +15,7 @@ typedef enum fifo_ret_t { // //Note that the actual storage for the FIFO is declared externally //and a reference to the base address of the storage is passed in along -//with the size of the storage. This way, multiple instances may be +//with the size of the storage. This way, multiple instances may be //different sizes. // ///////////////////////////////////////////////////////////////////////// @@ -34,4 +34,4 @@ typedef struct mem_fifo_short_t { unsigned read_idx; } mem_fifo_short_t; -#endif \ No newline at end of file +#endif diff --git a/examples/xua_lite_example/src/rate_controller.xc b/examples/xua_lite_example/src/rate_controller.xc index c6bc348b..58fddf48 100644 --- a/examples/xua_lite_example/src/rate_controller.xc +++ b/examples/xua_lite_example/src/rate_controller.xc @@ -58,7 +58,7 @@ static inline xua_lite_fixed_point_t add_noise(xua_lite_fixed_point_t input){ return (xua_lite_fixed_point_t)( output_64 >> (64 - XUA_LIGHT_FIXED_POINT_TOTAL_BITS - 1)); } -//Convert the control input into a pdm output (dither) with optional noise +//Convert the control input into a pdm output (dither) with optional noise void do_clock_nudge_pdm(xua_lite_fixed_point_t controller_out, int *clock_nudge){ //Randomise - add a proportion of rectangular probability distribution noise to spread the spectrum @@ -96,7 +96,7 @@ xua_lite_fixed_point_t do_rate_control(int fill_level, pid_state_t *pid_state){ //Calculate the value for the integral term which is the accumulated fill level error xua_lite_fixed_point_t i_term_pre_clip = pid_state->fifo_level_accum + fifo_level_filtered; - + //clip the I term (which can wind up) to maximum fixed point representation. Check to see if overflow (which will change sign) if (fifo_level_filtered >= 0){ //If it was positive before, ensure it still is else clip to positive if (i_term_pre_clip >= pid_state->fifo_level_accum){ @@ -159,18 +159,18 @@ void do_feedback_calculation(unsigned &sof_count // Average over 128 SOFs - 128 x 3072 = 0x60000. unsigned long long feedbackMul = 64ULL; - if(AUDIO_CLASS == 1) feedbackMul = 8ULL; // TODO Use 4 instead of 8 to avoid windows LSB issues? + if(AUDIO_CLASS == 1) feedbackMul = 8ULL; // TODO Use 4 instead of 8 to avoid windows LSB issues? - // Number of MCLK ticks in this SOF period (E.g = 125 * 24.576 = 3072) + // Number of MCLK ticks in this SOF period (E.g = 125 * 24.576 = 3072) int mclk_ticks_this_sof_period = (int) ((short)(mclk_port_counter - mclk_port_counter_old)); unsigned long long full_result = mclk_ticks_this_sof_period * feedbackMul * DEFAULT_FREQ; feedback_value += full_result; - // Store MCLK for next time around... + // Store MCLK for next time around... mclk_port_counter_old = mclk_port_counter; // Reset counts based on SOF counting. Expect 16ms (128 HS SOFs/16 FS SOFS) per feedback poll - // We always count 128 SOFs, so 16ms @ HS, 128ms @ FS + // We always count 128 SOFs, so 16ms @ HS, 128ms @ FS if(sof_count == 128){ //debug_printf("fb\n"); sof_count = 0; diff --git a/examples/xua_lite_example/src/xua_buffer_lite.xc b/examples/xua_lite_example/src/xua_buffer_lite.xc index b0253955..597cb938 100644 --- a/examples/xua_lite_example/src/xua_buffer_lite.xc +++ b/examples/xua_lite_example/src/xua_buffer_lite.xc @@ -37,14 +37,14 @@ unsafe void XUA_Buffer_lite(chanend c_ep0_out, chanend c_ep0_in, chanend c_aud_o union buffer_aud_out{ unsigned char bytes[OUT_AUDIO_BUFFER_SIZE_BYTES]; short short_words[OUT_AUDIO_BUFFER_SIZE_BYTES / 2]; - long long_words[OUT_AUDIO_BUFFER_SIZE_BYTES / 4]; + long long_words[OUT_AUDIO_BUFFER_SIZE_BYTES / 4]; }buffer_aud_out; union buffer_aud_in{ unsigned char bytes[IN_AUDIO_BUFFER_SIZE_BYTES]; short short_words[IN_AUDIO_BUFFER_SIZE_BYTES / 2]; - unsigned long long_words[IN_AUDIO_BUFFER_SIZE_BYTES / 4]; + unsigned long long_words[IN_AUDIO_BUFFER_SIZE_BYTES / 4]; }buffer_aud_in; - + unsigned in_subslot_size = (AUDIO_CLASS == 1) ? FS_STREAM_FORMAT_INPUT_1_SUBSLOT_BYTES : HS_STREAM_FORMAT_INPUT_1_SUBSLOT_BYTES; unsigned out_subslot_size = (AUDIO_CLASS == 1) ? FS_STREAM_FORMAT_OUTPUT_1_SUBSLOT_BYTES : HS_STREAM_FORMAT_OUTPUT_1_SUBSLOT_BYTES; @@ -54,7 +54,7 @@ unsafe void XUA_Buffer_lite(chanend c_ep0_out, chanend c_ep0_in, chanend c_aud_o long long feedback_value = 0; unsigned mod_from_last_time = 0; const unsigned mclk_hz = MCLK_48; - unsigned int fb_clocks[1] = {0}; + unsigned int fb_clocks[1] = {0}; //Adapative device clock control int clock_nudge = 0; @@ -86,7 +86,7 @@ unsafe void XUA_Buffer_lite(chanend c_ep0_out, chanend c_ep0_in, chanend c_aud_o XUD_SetReady_InPtr(ep_aud_in, (unsigned)buffer_aud_in.long_words, num_samples_to_send_to_host); XUD_SetReady_Out(ep0_out, sbuffer); if (!isnull(c_feedback)) XUD_SetReady_InPtr(ep_feedback, (unsigned)fb_clocks, (AUDIO_CLASS == 2) ? 4 : 3); - + //Send initial samples so audiohub is not blocked for (int i = 0; i < 2 * (NUM_USB_CHAN_OUT + (XUA_ADAPTIVE != 0 ? 1 : 0)); i++) c_audio_hub <: 0; @@ -113,7 +113,7 @@ unsafe void XUA_Buffer_lite(chanend c_ep0_out, chanend c_ep0_in, chanend c_aud_o debug_printf("ep0, result: %d, length: %d\n", result, length); //-1 reset, 0 ok, 1 error USB_ParseSetupPacket(sbuffer, sp); //Parse data buffer end populate SetupPacket struct - + XUA_Endpoint0_lite_loop(result, sp, c_ep0_out, c_ep0_in, c_audioControl, null/*mix*/, null/*clk*/, null/*EA*/, dfuInterface, &input_interface_num, &output_interface_num); XUD_SetReady_Out(ep0_out, sbuffer); tmr :> t1; debug_printf("c%d\n", t1 - t0); @@ -136,11 +136,11 @@ unsafe void XUA_Buffer_lite(chanend c_ep0_out, chanend c_ep0_in, chanend c_aud_o timer tmr; int t0, t1; tmr :> t0; num_samples_received_from_host = length / out_subslot_size; - + fifo_ret_t ret = fifo_block_push_short(host_to_device_fifo_ptr, buffer_aud_out.short_words, num_samples_received_from_host); if (ret != FIFO_SUCCESS) debug_printf("h2d full\n"); num_samples_to_send_to_host = num_samples_received_from_host; - + int fill_level = fifo_get_fill_short(host_to_device_fifo_ptr); if (isnull(c_feedback)) do_clock_nudge_pdm(do_rate_control(fill_level, &pid_state), &clock_nudge); @@ -171,7 +171,7 @@ unsafe void XUA_Buffer_lite(chanend c_ep0_out, chanend c_ep0_in, chanend c_aud_o //Populate the input buffer ready for the next read //pack_samples_to_buff(loopback_samples, num_samples_to_send_to_host, in_subslot_size, buffer_aud_in); //Use the number of samples we received last time so we are always balanced (assumes same in/out count) - + unsigned input_buffer_size = num_samples_to_send_to_host * in_subslot_size; XUD_SetReady_InPtr(ep_aud_in, (unsigned)buffer_aud_in.long_words, input_buffer_size); //loopback num_samples_to_send_to_host = 0; @@ -211,14 +211,14 @@ unsafe void XUA_Buffer_lite2(server ep0_control_if i_ep0_ctl, chanend c_aud_out, union buffer_aud_out{ unsigned char bytes[OUT_AUDIO_BUFFER_SIZE_BYTES]; short short_words[OUT_AUDIO_BUFFER_SIZE_BYTES / 2]; - long long_words[OUT_AUDIO_BUFFER_SIZE_BYTES / 4]; + long long_words[OUT_AUDIO_BUFFER_SIZE_BYTES / 4]; }buffer_aud_out; union buffer_aud_in{ unsigned char bytes[IN_AUDIO_BUFFER_SIZE_BYTES]; short short_words[IN_AUDIO_BUFFER_SIZE_BYTES / 2]; - unsigned long long_words[IN_AUDIO_BUFFER_SIZE_BYTES / 4]; + unsigned long long_words[IN_AUDIO_BUFFER_SIZE_BYTES / 4]; }buffer_aud_in; - + unsigned in_subslot_size = (AUDIO_CLASS == 1) ? FS_STREAM_FORMAT_INPUT_1_SUBSLOT_BYTES : HS_STREAM_FORMAT_INPUT_1_SUBSLOT_BYTES; unsigned out_subslot_size = (AUDIO_CLASS == 1) ? FS_STREAM_FORMAT_OUTPUT_1_SUBSLOT_BYTES : HS_STREAM_FORMAT_OUTPUT_1_SUBSLOT_BYTES; @@ -228,7 +228,7 @@ unsafe void XUA_Buffer_lite2(server ep0_control_if i_ep0_ctl, chanend c_aud_out, long long feedback_value = 0; unsigned mod_from_last_time = 0; const unsigned mclk_hz = MCLK_48; - unsigned int fb_clocks[1] = {0}; + unsigned int fb_clocks[1] = {0}; //Adapative device clock control int clock_nudge = 0; @@ -251,7 +251,7 @@ unsafe void XUA_Buffer_lite2(server ep0_control_if i_ep0_ctl, chanend c_aud_out, XUD_SetReady_OutPtr(ep_aud_out, (unsigned)buffer_aud_out.long_words); XUD_SetReady_InPtr(ep_aud_in, (unsigned)buffer_aud_in.long_words, num_samples_to_send_to_host); if (!isnull(c_feedback)) XUD_SetReady_InPtr(ep_feedback, (unsigned)fb_clocks, (AUDIO_CLASS == 2) ? 4 : 3); - + short samples_in_short[NUM_USB_CHAN_IN] = {0}; short samples_out_short[NUM_USB_CHAN_OUT] = {0}; @@ -311,11 +311,11 @@ unsafe void XUA_Buffer_lite2(server ep0_control_if i_ep0_ctl, chanend c_aud_out, num_samples_received_from_host = length / out_subslot_size; if (num_samples_received_from_host != 96) debug_printf("hs: %d\n", num_samples_received_from_host); - + fifo_ret_t ret = fifo_block_push_short_fast(host_to_device_fifo_ptr, buffer_aud_out.short_words, num_samples_received_from_host); if (ret != FIFO_SUCCESS) debug_printf("h2d full\n"); num_samples_to_send_to_host = num_samples_received_from_host; - + int fill_level = fifo_get_fill_short(host_to_device_fifo_ptr); if (isnull(c_feedback)) do_clock_nudge_pdm(do_rate_control(fill_level, &pid_state), &clock_nudge); @@ -353,7 +353,7 @@ unsafe void XUA_Buffer_lite2(server ep0_control_if i_ep0_ctl, chanend c_aud_out, //Populate the input buffer ready for the next read //pack_samples_to_buff(loopback_samples, num_samples_to_send_to_host, in_subslot_size, buffer_aud_in); //Use the number of samples we received last time so we are always balanced (assumes same in/out count) - + unsigned input_buffer_size = num_samples_to_send_to_host * in_subslot_size; XUD_SetReady_InPtr(ep_aud_in, (unsigned) buffer_aud_in.long_words, input_buffer_size); //loopback num_samples_to_send_to_host = 0; diff --git a/examples/xua_lite_example/src/xua_conf.h b/examples/xua_lite_example/src/xua_conf.h index 62274619..ae9de112 100644 --- a/examples/xua_lite_example/src/xua_conf.h +++ b/examples/xua_lite_example/src/xua_conf.h @@ -1,6 +1,6 @@ // Copyright (c) 2017-2018, XMOS Ltd, All rights reserved -#ifndef _XUA_CONF_H_ +#ifndef _XUA_CONF_H_ #define _XUA_CONF_H_ #define NUM_USB_CHAN_OUT 2 /* Number of channels from host to device */ @@ -18,7 +18,7 @@ #define VENDOR_ID 0x20B1 #define PRODUCT_STR_A2 "XUA Lite Class 2" #define PRODUCT_STR_A1 "XUA Lite Class 1" -#define PID_AUDIO_1 1 +#define PID_AUDIO_1 1 #define PID_AUDIO_2 2 #define XUA_DFU_EN 0 /* Disable DFU (for simplicity of example) */ @@ -28,7 +28,7 @@ #define STREAM_FORMAT_OUTPUT_1_RESOLUTION_BITS 16 #define OUTPUT_VOLUME_CONTROL 0 -#define INPUT_VOLUME_CONTROL 0 +#define INPUT_VOLUME_CONTROL 0 #define UAC_FORCE_FEEDBACK_EP 0 #define XUA_ADAPTIVE 1