Merge branch 'develop' into changelog

This commit is contained in:
Ross Owen
2022-03-09 11:43:30 +00:00
committed by GitHub
13 changed files with 86 additions and 66 deletions

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@@ -5,6 +5,8 @@ UNRELEASED
---------- ----------
* CHANGED: Updated tests to use lib_locks (was legacy module_locks) * CHANGED: Updated tests to use lib_locks (was legacy module_locks)
* CHANGED: Exclude HID Report functions unless the HID feature is enabled
* FIXED: Incorrect conditional compilation of HID report code
* Changes to dependencies: * Changes to dependencies:

2
Jenkinsfile vendored
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@@ -1,4 +1,4 @@
@Library('xmos_jenkins_shared_library@v0.16.2') _ @Library('xmos_jenkins_shared_library@v0.18.0') _
getApproval() getApproval()

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@@ -1,7 +1,5 @@
# Copyright (c) 2016, XMOS Ltd, All rights reserved
TARGET = xk-audio-216-mc.xn TARGET = xk-audio-216-mc.xn
USED_MODULES = lib_xua \ USED_MODULES = lib_xua lib_i2c lib_logging
module_i2c_shared module_i2c_single_port lib_logging
BUILD_FLAGS = -O0 -g -lflash -DXUD_SERIES_SUPPORT=4 -DXUD_CORE_CLOCK=600 -fxscope -save-temps -march=xs2a -DUSB_TILE=tile[1] BUILD_FLAGS = -O0 -g -lflash -DXUD_SERIES_SUPPORT=4 -DXUD_CORE_CLOCK=600 -fxscope -save-temps -march=xs2a -DUSB_TILE=tile[1]

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@@ -1,4 +1,4 @@
// Copyright 2016-2021 XMOS LIMITED. // Copyright 2016-2022 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1. // This Software is subject to the terms of the XMOS Public Licence: Version 1.
#ifdef HARDWARE #ifdef HARDWARE
@@ -8,7 +8,7 @@
#include "devicedefines.h" #include "devicedefines.h"
#include <platform.h> #include <platform.h>
#include "gpio_access.h" #include "gpio_access.h"
#include "i2c_shared.h" #include "i2c.h"
#include "cs4384.h" #include "cs4384.h"
#include "cs5368.h" #include "cs5368.h"
#include "cs2100.h" #include "cs2100.h"
@@ -25,16 +25,10 @@
on tile[0] : out port p_gpio = XS1_PORT_8C; on tile[0] : out port p_gpio = XS1_PORT_8C;
#ifndef IAP port p_i2c = on tile[0]:PORT_I2C;
/* If IAP not enabled, i2c ports not declared - still needs for DAC config */
on tile [0] : struct r_i2c r_i2c = {XS1_PORT_4A};
#else
extern struct r_i2c r_i2c;
#endif
#define DAC_REGWRITE(reg, val) {data[0] = val; i2c_shared_master_write_reg(r_i2c, CS4384_I2C_ADDR, reg, data, 1);} #define DAC_REGWRITE(reg, val) {result = i2c.write_reg(CS4384_I2C_ADDR, reg, val);}
#define DAC_REGREAD(reg, val) {i2c_shared_master_read_reg(r_i2c, CS4384_I2C_ADDR, reg, val, 1);} #define ADC_REGWRITE(reg, val) {result = i2c.write_reg(CS5368_I2C_ADDR, reg, val);}
#define ADC_REGWRITE(reg, val) {data[0] = val; i2c_shared_master_write_reg(r_i2c, CS5368_I2C_ADDR, reg, data, 1);}
#ifdef USE_FRACTIONAL_N #ifdef USE_FRACTIONAL_N
@@ -45,14 +39,15 @@ extern struct r_i2c r_i2c;
#define PLL_SYNC_FREQ 300 #define PLL_SYNC_FREQ 300
#endif #endif
#define CS2100_REGREAD(reg, data) {data[0] = 0xAA; i2c_master_read_reg(CS2100_I2C_DEVICE_ADDR, reg, data, 1, r_i2c);} #define CS2100_REGREAD(reg, data) {data[0] = i2c.read_reg(CS2100_I2C_DEVICE_ADDR, reg, result);}
#define CS2100_REGREAD_ASSERT(reg, data, expected) {data[0] = 0xAA; i2c_master_read_reg(CS2100_I2C_DEVICE_ADDR, reg, data, 1, r_i2c); assert(data[0] == expected);} #define CS2100_REGREAD_ASSERT(reg, data, expected) {data[0] = i2c.read_reg(CS2100_I2C_DEVICE_ADDR, reg, result); assert(data[0] == expected);}
#define CS2100_REGWRITE(reg, val) {data[0] = val; i2c_master_write_reg(CS2100_I2C_DEVICE_ADDR, reg, data, 1, r_i2c);} #define CS2100_REGWRITE(reg, val) {result = i2c.write_reg(CS2100_I2C_DEVICE_ADDR, reg, val);}
/* Init of CS2100 */ /* Init of CS2100 */
void PllInit(void) void PllInit(client interface i2c_master_if i2c)
{ {
unsigned char data[1] = {0}; unsigned char data[1] = {0};
i2c_regop_res_t result;
#if XCORE_200_MC_AUDIO_HW_VERSION < 2 #if XCORE_200_MC_AUDIO_HW_VERSION < 2
/* Enable init */ /* Enable init */
@@ -73,12 +68,15 @@ void PllInit(void)
CS2100_REGREAD_ASSERT(CS2100_GLOBAL_CONFIG, data, 0x01); CS2100_REGREAD_ASSERT(CS2100_GLOBAL_CONFIG, data, 0x01);
CS2100_REGREAD_ASSERT(CS2100_FUNC_CONFIG_1, data, 0x08); CS2100_REGREAD_ASSERT(CS2100_FUNC_CONFIG_1, data, 0x08);
CS2100_REGREAD_ASSERT(CS2100_FUNC_CONFIG_2, data, 0x00); CS2100_REGREAD_ASSERT(CS2100_FUNC_CONFIG_2, data, 0x00);
i2c.shutdown();
} }
/* Setup PLL multiplier */ /* Setup PLL multiplier */
void PllMult(unsigned output, unsigned ref) void PllMult(unsigned output, unsigned ref, client interface i2c_master_if i2c)
{ {
unsigned char data[1] = {0}; unsigned char data[1] = {0};
i2c_regop_res_t result;
/* PLL expects 12:20 format, convert output and ref to 12:20 */ /* PLL expects 12:20 format, convert output and ref to 12:20 */
/* Shift up the dividend by 12 to retain format... */ /* Shift up the dividend by 12 to retain format... */
@@ -120,9 +118,6 @@ void AudioHwInit(chanend ?c_codec)
start_clock(clk_pll_sync); start_clock(clk_pll_sync);
#endif #endif
/* Init the i2c module */
i2c_shared_master_init(r_i2c);
/* Assert reset to ADC and DAC */ /* Assert reset to ADC and DAC */
set_gpio(P_GPIO_DAC_RST_N, 0); set_gpio(P_GPIO_DAC_RST_N, 0);
set_gpio(P_GPIO_ADC_RST_N, 0); set_gpio(P_GPIO_ADC_RST_N, 0);
@@ -143,7 +138,12 @@ void AudioHwInit(chanend ?c_codec)
set_gpio(P_GPIO_PLL_SEL, 1); set_gpio(P_GPIO_PLL_SEL, 1);
/* Initialise external PLL */ /* Initialise external PLL */
PllInit(); i2c_master_if i2c[1];
par
{
i2c_master_single_port(i2c, 1, p_i2c, 10, 0, 1, 0);
PllInit(i2c[0]);
}
#endif #endif
#ifdef IAP #ifdef IAP
@@ -155,10 +155,11 @@ void AudioHwInit(chanend ?c_codec)
/* Configures the external audio hardware for the required sample frequency. /* Configures the external audio hardware for the required sample frequency.
* See gpio.h for I2C helper functions and gpio access * See gpio.h for I2C helper functions and gpio access
*/ */
void AudioHwConfig(unsigned samFreq, unsigned mClk, chanend ?c_codec, unsigned dsdMode, void AudioHwConfig2(unsigned samFreq, unsigned mClk, chanend ?c_codec, unsigned dsdMode,
unsigned sampRes_DAC, unsigned sampRes_ADC) unsigned sampRes_DAC, unsigned sampRes_ADC, client interface i2c_master_if i2c)
{ {
unsigned char data[1] = {0}; unsigned char data[1] = {0};
i2c_regop_res_t result;
/* Put ADC and DAC into reset */ /* Put ADC and DAC into reset */
set_gpio(P_GPIO_ADC_RST_N, 0); set_gpio(P_GPIO_ADC_RST_N, 0);
@@ -167,7 +168,7 @@ void AudioHwConfig(unsigned samFreq, unsigned mClk, chanend ?c_codec, unsigned d
/* Set master clock select appropriately */ /* Set master clock select appropriately */
#if defined(USE_FRACTIONAL_N) #if defined(USE_FRACTIONAL_N)
/* Configure external fractional-n clock multiplier for 300Hz -> mClkFreq */ /* Configure external fractional-n clock multiplier for 300Hz -> mClkFreq */
PllMult(mClk, PLL_SYNC_FREQ); PllMult(mClk, PLL_SYNC_FREQ, i2c);
#endif #endif
/* Allow some time for mclk to lock and MCLK to stabilise - this is important to avoid glitches at start of stream */ /* Allow some time for mclk to lock and MCLK to stabilise - this is important to avoid glitches at start of stream */
{ {
@@ -365,8 +366,20 @@ void AudioHwConfig(unsigned samFreq, unsigned mClk, chanend ?c_codec, unsigned d
DAC_REGWRITE(CS4384_MODE_CTRL, 0b10000000); DAC_REGWRITE(CS4384_MODE_CTRL, 0b10000000);
} }
#endif #endif
i2c.shutdown();
return; return;
} }
//:
void AudioHwConfig(unsigned samFreq, unsigned mClk, chanend ?c_codec, unsigned dsdMode,
unsigned sampRes_DAC, unsigned sampRes_ADC)
{
i2c_master_if i2c[1];
par
{
i2c_master_single_port(i2c, 1, p_i2c, 10, 0, 1, 0);
AudioHwConfig2(samFreq, mClk, c_codec, dsdMode, sampRes_DAC, sampRes_ADC, i2c[0]);
}
}
#endif #endif

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@@ -748,6 +748,8 @@ void XUA_Buffer_Decouple(chanend c_mix_out
outct(c_mix_out, SET_SAMPLE_FREQ); outct(c_mix_out, SET_SAMPLE_FREQ);
outuint(c_mix_out, sampFreq); outuint(c_mix_out, sampFreq);
if(sampFreq != AUDIO_STOP_FOR_DFU)
{
inUnderflow = 1; inUnderflow = 1;
SET_SHARED_GLOBAL(g_aud_to_host_rdptr, aud_to_host_fifo_start); SET_SHARED_GLOBAL(g_aud_to_host_rdptr, aud_to_host_fifo_start);
SET_SHARED_GLOBAL(g_aud_to_host_wrptr, aud_to_host_fifo_start); SET_SHARED_GLOBAL(g_aud_to_host_wrptr, aud_to_host_fifo_start);
@@ -771,6 +773,7 @@ void XUA_Buffer_Decouple(chanend c_mix_out
XUD_SetReady_OutPtr(aud_from_host_usb_ep, aud_from_host_fifo_start+4); XUD_SetReady_OutPtr(aud_from_host_usb_ep, aud_from_host_fifo_start+4);
outOverflow = 0; outOverflow = 0;
} }
}
/* Wait for handshake back and pass back up */ /* Wait for handshake back and pass back up */
chkct(c_mix_out, XS1_CT_END); chkct(c_mix_out, XS1_CT_END);
@@ -780,6 +783,7 @@ void XUA_Buffer_Decouple(chanend c_mix_out
ENABLE_INTERRUPTS(); ENABLE_INTERRUPTS();
if(sampFreq != AUDIO_STOP_FOR_DFU)
speedRem = 0; speedRem = 0;
continue; continue;
} }

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@@ -1104,6 +1104,9 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
break; break;
} }
break; break;
#endif // if IAP_EA_NATIVE_TRANS
#endif // ifdef IAP
default: default:
#if ( 0 < HID_CONTROLS ) #if ( 0 < HID_CONTROLS )
@@ -1125,9 +1128,6 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
#endif #endif
break; break;
//:: //::
#endif
#endif
} }

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@@ -1,4 +1,4 @@
// Copyright 2011-2021 XMOS LIMITED. // Copyright 2011-2022 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1. // This Software is subject to the terms of the XMOS Public Licence: Version 1.
/** /**
* @file xua_ep0_descriptors.h * @file xua_ep0_descriptors.h
@@ -2331,9 +2331,10 @@ const unsigned num_freqs_a1 = MAX(3, (0
#define CFG_TOTAL_LENGTH_A1 (18 + AC_TOTAL_LENGTH + (INPUT_INTERFACES_A1 * (49 + num_freqs_a1 * 3)) + (OUTPUT_INTERFACES_A1 * (49 + num_freqs_a1 * 3)) + CONTROL_INTERFACE_BYTES + DFU_INTERFACE_BYTES + HID_INTERFACE_BYTES) #define CFG_TOTAL_LENGTH_A1 (18 + AC_TOTAL_LENGTH + (INPUT_INTERFACES_A1 * (49 + num_freqs_a1 * 3)) + (OUTPUT_INTERFACES_A1 * (49 + num_freqs_a1 * 3)) + CONTROL_INTERFACE_BYTES + DFU_INTERFACE_BYTES + HID_INTERFACE_BYTES)
#endif #endif
#define INTERFACE_DESCRIPTOR_BYTES (9)
#ifdef XUA_USB_DESCRIPTOR_OVERWRITE_RATE_RES #ifdef XUA_USB_DESCRIPTOR_OVERWRITE_RATE_RES
#define AS_INTERFACE_BYTES (7) #define AS_INTERFACE_BYTES (7)
#define INTERFACE_DESCRIPTOR_BYTES (9)
#define AS_FORMAT_TYPE_BYTES (17) #define AS_FORMAT_TYPE_BYTES (17)
#define USB_AS_IN_INTERFACE_DESCRIPTOR_OFFSET_SUB_FRAME (18 + AC_TOTAL_LENGTH + (OUTPUT_INTERFACES_A1 * (49 + num_freqs_a1 * 3)) + (2*INTERFACE_DESCRIPTOR_BYTES) + (AS_INTERFACE_BYTES) + 5) #define USB_AS_IN_INTERFACE_DESCRIPTOR_OFFSET_SUB_FRAME (18 + AC_TOTAL_LENGTH + (OUTPUT_INTERFACES_A1 * (49 + num_freqs_a1 * 3)) + (2*INTERFACE_DESCRIPTOR_BYTES) + (AS_INTERFACE_BYTES) + 5)
#define USB_AS_OUT_INTERFACE_DESCRIPTOR_OFFSET_SUB_FRAME (18 + AC_TOTAL_LENGTH + (2*INTERFACE_DESCRIPTOR_BYTES) + (AS_INTERFACE_BYTES) + 5) #define USB_AS_OUT_INTERFACE_DESCRIPTOR_OFFSET_SUB_FRAME (18 + AC_TOTAL_LENGTH + (2*INTERFACE_DESCRIPTOR_BYTES) + (AS_INTERFACE_BYTES) + 5)

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@@ -1,4 +1,4 @@
// Copyright 2011-2021 XMOS LIMITED. // Copyright 2011-2022 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1. // This Software is subject to the terms of the XMOS Public Licence: Version 1.
/** /**
* @brief Implements relevant requests from the USB Audio 2.0 Specification * @brief Implements relevant requests from the USB Audio 2.0 Specification
@@ -1280,6 +1280,9 @@ XUD_Result_t AudioClassRequests_1(XUD_ep ep0_out, XUD_ep ep0_in, USB_SetupPacket
buffer[0] = (VOLUME_RES_MIXER & 0xff); buffer[0] = (VOLUME_RES_MIXER & 0xff);
buffer[1] = (VOLUME_RES_MIXER >> 8); buffer[1] = (VOLUME_RES_MIXER >> 8);
return XUD_DoGetRequest(ep0_out, ep0_in, buffer, 2, sp.wLength); return XUD_DoGetRequest(ep0_out, ep0_in, buffer, 2, sp.wLength);
default:
break;
} }
#endif #endif
return XUD_RES_ERR; return XUD_RES_ERR;

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@@ -1,5 +1,8 @@
// Copyright 2021-2022 XMOS LIMITED. // Copyright 2021-2022 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1. // This Software is subject to the terms of the XMOS Public Licence: Version 1.
#include "xua_conf_full.h"
#if( 0 < HID_CONTROLS )
#include <assert.h> #include <assert.h>
#include <stddef.h> #include <stddef.h>
#include <stdio.h> #include <stdio.h>
@@ -851,3 +854,5 @@ unsigned hidReportValidate( void )
return hidReportValidateInfoStruct( &info ); return hidReportValidateInfoStruct( &info );
} }
} }
#endif // ( 0 < HID_CONTROLS )

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@@ -1,7 +0,0 @@
module_locks Readme
===================
:scope: Dummy module
:description: Allows compiling legacy_tests in lib_xua with lib_locks. sc_i2c is used in the tests and it requires module_locks from sc_util, but the definitions in sc_utils conflict with the ones in lib_locks.
:keywords: dummy
:boards: XMOS Dev Kit

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@@ -1 +0,0 @@
# Dummy module used in legacy_tests. See README.rst for more details.

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@@ -49,6 +49,7 @@ foreach( testsourcefile ${APP_SOURCES} )
"-fxscope" "-fxscope"
"-target=XCORE-AI-EXPLORER" "-target=XCORE-AI-EXPLORER"
"${CMAKE_CURRENT_SOURCE_DIR}/config.xscope" "${CMAKE_CURRENT_SOURCE_DIR}/config.xscope"
"-DHID_CONTROLS=1"
"-DUNITY_SUPPORT_64" "-DUNITY_SUPPORT_64"
"-DUNITY_INCLUDE_DOUBLE" "-DUNITY_INCLUDE_DOUBLE"
) )

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@@ -230,6 +230,7 @@ def build(bld):
makefile_opts['XCC_FLAGS'] = ['-O2', makefile_opts['XCC_FLAGS'] = ['-O2',
'-g', '-g',
'-Wall', '-Wall',
'-DHID_CONTROLS=1',
'-DUNITY_SUPPORT_64', '-DUNITY_SUPPORT_64',
'-DUNITY_INCLUDE_DOUBLE', '-DUNITY_INCLUDE_DOUBLE',
'-DXUD_CORE_CLOCK=600', '-DXUD_CORE_CLOCK=600',