344 lines
6.9 KiB
Plaintext
Executable File
344 lines
6.9 KiB
Plaintext
Executable File
#include <xs1.h>
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#include <print.h>
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int I2cRegReadC(int device, int addr, chanend c) {
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int read;
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int retVal;
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c <: 0; // isWrite
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c <: device;
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c <: addr;
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c <: 1; // only ever one byte
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c :> read;
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c :> retVal;
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return read;
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}
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void I2cRegWriteC(int device, int addr, int data, chanend c) {
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int retVal;
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c <: 1; // isWrite
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c <: device;
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c <: addr;
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c <: 1; // only ever one byte
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c <: data;
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c :> retVal;
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}
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int I2cRegRead(int device, int addr, port scl, port sda)
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{
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//int Result;
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timer gt;
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unsigned time;
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int Temp, CtlAdrsData, i;
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// three device ACK
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int ack[3];
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int rdData;
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// initial values.
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scl <: 1;
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sda <: 1;
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sync(sda);
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gt :> time;
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time += 1000 + 1000;
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gt when timerafter(time) :> int _;
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// start bit on SDI
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scl <: 1;
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sda <: 0;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 0;
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// shift 7bits of address and 1bit R/W (fixed to write).
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// WARNING: Assume MSB first.
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for (i = 0; i < 8; i += 1)
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{
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Temp = (device >> (7 - i)) & 0x1;
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sda <: Temp;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 1;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 0;
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}
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// turn the data to input
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sda :> Temp;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 1;
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// sample first ACK.
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sda :> ack[0];
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 0;
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CtlAdrsData = (addr & 0xFF);
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// shift first 8 bits.
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for (i = 0; i < 8; i += 1)
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{
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Temp = (CtlAdrsData >> (7 - i)) & 0x1;
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sda <: Temp;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 1;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 0;
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}
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// turn the data to input
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sda :> Temp;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 1;
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// sample second ACK.
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sda :> ack[1];
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 0;
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// stop bit
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gt :> time;
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time += 1000 + 1000;
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gt when timerafter(time) :> int _;
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// start bit on SDI
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scl <: 1;
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sda <: 1;
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time += 1000 + 1000;
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gt when timerafter(time) :> int _;
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scl <: 0;
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time += 1000 + 1000;
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gt when timerafter(time) :> int _;
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// send address and read
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scl <: 1;
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sda <: 1;
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sync(sda);
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gt :> time;
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time += 1000 + 1000;
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gt when timerafter(time) :> int _;
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// start bit on SDI
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scl <: 1;
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sda <: 0;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 0;
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// shift 7bits of address and 1bit R/W (fixed to write).
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// WARNING: Assume MSB first.
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for (i = 0; i < 8; i += 1)
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{
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int deviceAddr = device | 1;
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Temp = (deviceAddr >> (7 - i)) & 0x1;
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sda <: Temp;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 1;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 0;
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}
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// turn the data to input
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sda :> Temp;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 1;
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// sample first ACK.
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sda :> ack[0];
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 0;
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rdData = 0;
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// shift second 8 bits.
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for (i = 0; i < 8; i += 1)
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{
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 1;
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sda :> Temp;
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rdData = (rdData << 1) | (Temp & 1);
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 0;
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}
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// turn the data to input
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sda :> Temp;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 1;
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// sample second ACK.
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sda :> ack[2];
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 0;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> int _;
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scl <: 1;
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// put the data to a good value for next round.
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sda <: 1;
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// validate all items are ACK properly.
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//Result = 0;
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//for (i = 0; i < 3; i += 1)
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//{
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//if ((ack[i]&1) != 0)
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//{
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//Result = Result | (1 << i);
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//}
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//}
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return rdData;
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}
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void I2cRegWrite(int device, int addr, int data, port scl, port sda)
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{
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//int Result;
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timer gt;
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unsigned time;
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int Temp, CtlAdrsData, i;
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// three device ACK
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int ack[3];
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// initial values.
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scl <: 1;
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sda <: 1;
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sync(sda);
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gt :> time;
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time += 1000 + 1000;
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gt when timerafter(time) :> void;
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// start bit on SDI
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scl <: 1;
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sda <: 0;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> void;
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scl <: 0;
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// shift 7bits of address and 1bit R/W (fixed to write).
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// WARNING: Assume MSB first.
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for (i = 0; i < 8; i += 1)
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{
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Temp = (device >> (7 - i)) & 0x1;
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sda <: Temp;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> void;
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scl <: 1;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> void;
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scl <: 0;
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}
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// turn the data to input
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sda :> Temp;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> void;
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scl <: 1;
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// sample first ACK.
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sda :> ack[0];
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> void;
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scl <: 0;
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CtlAdrsData = (addr & 0xFF);
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// shift first 8 bits.
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for (i = 0; i < 8; i += 1)
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{
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Temp = (CtlAdrsData >> (7 - i)) & 0x1;
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sda <: Temp;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> void;
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scl <: 1;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> void;
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scl <: 0;
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}
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// turn the data to input
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sda :> Temp;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> void;
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scl <: 1;
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// sample second ACK.
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sda :> ack[1];
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> void;
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scl <: 0;
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CtlAdrsData = (data & 0xFF);
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// shift second 8 bits.
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for (i = 0; i < 8; i += 1)
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{
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Temp = (CtlAdrsData >> (7 - i)) & 0x1;
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sda <: Temp;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> void;
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scl <: 1;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> void;
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scl <: 0;
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}
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// turn the data to input
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sda :> Temp;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> void;
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scl <: 1;
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// sample second ACK.
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sda :> ack[2];
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> void;
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scl <: 0;
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gt :> time;
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time += 1000;
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gt when timerafter(time) :> void;
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scl <: 1;
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// put the data to a good value for next round.
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sda <: 1;
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// validate all items are ACK properly.
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//Result = 0;
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//for (i = 0; i < 3; i += 1)
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//{
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//if ((ack[i]&1) != 0)
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//{
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//Result = Result | (1 << i);
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//}
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//}
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//return(Result);
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}
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