From 44049ecfca7799d2cde6b4c814cea0c378a91ae4 Mon Sep 17 00:00:00 2001
From: Ed <ed@xmos.com>
Date: Tue, 23 Jan 2024 11:43:36 +0000
Subject: [PATCH] Use CT_END in sw_pll comms to clear switch path

---
 lib_xua/src/core/buffer/ep/ep_buffer.xc     | 6 +++++-
 lib_xua/src/core/clocking/clockgen.xc       | 3 ++-
 lib_xua/src/core/clocking/sw_pll_wrapper.xc | 6 ++++++
 3 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/lib_xua/src/core/buffer/ep/ep_buffer.xc b/lib_xua/src/core/buffer/ep/ep_buffer.xc
index 6e5ba75c..171fa7cf 100644
--- a/lib_xua/src/core/buffer/ep/ep_buffer.xc
+++ b/lib_xua/src/core/buffer/ep/ep_buffer.xc
@@ -385,7 +385,9 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
                     0,                                      /* Assume precise timing of sampling */
                     pfd_ppm_max);                           
     outuint(c_sw_pll, masterClockFreq);
+    outct(c_sw_pll, XS1_CT_END);
     inuint(c_sw_pll); /* receive ACK */
+    inct(c_sw_pll);
 
 #else /* XUA_USE_SW_PLL */
     timer t_sofCheck;
@@ -602,8 +604,9 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
                     sw_pll_pfd.mclk_pt_last = mclk_pt;
 
                     outuint(c_sw_pll, error);
+                    outct(c_sw_pll, XS1_CT_END);
+
                     printintln(error);
-                    // outct(c_sw_pll, XS1_CT_END);
                 }
 #endif
 
@@ -1044,6 +1047,7 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
 #if (XUA_USE_SW_PLL)
             /* This is fired when sw_pll has completed initialising a new mclk_rate */
             case inuint_byref(c_sw_pll, u_tmp):
+                inct(c_sw_pll);
                 printstr("SWPLL synch\n");
                 c_audio_rate_change <: 0;     /* ACK back to audio to release */
                 
diff --git a/lib_xua/src/core/clocking/clockgen.xc b/lib_xua/src/core/clocking/clockgen.xc
index 88166a85..f44c7f37 100644
--- a/lib_xua/src/core/clocking/clockgen.xc
+++ b/lib_xua/src/core/clocking/clockgen.xc
@@ -520,7 +520,8 @@ void clockGen ( streaming chanend ?c_spdif_rx,
 #endif
 
 #if ((XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && XUA_USE_SW_PLL)
-            case inuint_byref(c_sw_pll, tmp): 
+            case inuint_byref(c_sw_pll, tmp):
+                inct(c_sw_pll); 
                 /* Send ACK back to audiohub to allow I2S to start
                    This happens only on SDM restart and only once */
                 if(require_ack_to_audio)
diff --git a/lib_xua/src/core/clocking/sw_pll_wrapper.xc b/lib_xua/src/core/clocking/sw_pll_wrapper.xc
index c83b9a6c..04397396 100644
--- a/lib_xua/src/core/clocking/sw_pll_wrapper.xc
+++ b/lib_xua/src/core/clocking/sw_pll_wrapper.xc
@@ -107,6 +107,7 @@ void do_sw_pll_phase_frequency_detector_dig_rx( unsigned short mclk_time_stamp,
 
         /* send PFD output to the sigma delta thread */
         outuint(c_sw_pll, (int) f_error);
+        outct(c_sw_pll, XS1_CT_END);
      
         last_mclk_time_stamp = mclk_time_stamp;
         control_loop_counter = 0;
@@ -122,6 +123,7 @@ void sw_pll_task(chanend c_sw_pll){
     while(1)
     {
         unsigned selected_mclk_rate = inuint(c_sw_pll);
+        inct(c_sw_pll);
 
         int f_error = 0;
         int dco_setting = 0;        /* gets set at init_sw_pll */
@@ -139,6 +141,7 @@ void sw_pll_task(chanend c_sw_pll){
         int running = 1;
 
         outuint(c_sw_pll, 0); /* Signal back via clockgen to audio to start I2S */
+        outct(c_sw_pll, XS1_CT_END);
 
         unsigned rx_word = 0;
         while(running)
@@ -147,6 +150,7 @@ void sw_pll_task(chanend c_sw_pll){
             select
             {
                 case inuint_byref(c_sw_pll, rx_word):
+                    inct(c_sw_pll);
                     if(rx_word == DISABLE_SDM)
                     {
                         f_error = 0;
@@ -189,7 +193,9 @@ void sw_pll_task(chanend c_sw_pll){
 void restart_sigma_delta(chanend c_sw_pll, unsigned selected_mclk_rate)
 {
     outuint(c_sw_pll, DISABLE_SDM); /* Resets SDM */
+    outct(c_sw_pll, XS1_CT_END);
     outuint(c_sw_pll, selected_mclk_rate);
+    outct(c_sw_pll, XS1_CT_END);
 }
 
 #endif /* XUA_USE_SW_PLL */