From 538f6f3bf32c0585934b020e032998e54e396f9e Mon Sep 17 00:00:00 2001 From: Ross Owen Date: Wed, 23 Oct 2013 12:39:48 +0100 Subject: [PATCH] Added MIN_FREQ define, MAX_FREQ now auto-defined as 192k, Native DSD enabled by default (if DSD enabled) --- module_usb_audio/devicedefines.h | 43 ++++++++++++++++----- module_usb_audio/endpoint0/audiorequests.xc | 20 +++++----- module_usb_audio/main.xc | 7 ++-- 3 files changed, 47 insertions(+), 23 deletions(-) diff --git a/module_usb_audio/devicedefines.h b/module_usb_audio/devicedefines.h index 5866478a..42f6b124 100644 --- a/module_usb_audio/devicedefines.h +++ b/module_usb_audio/devicedefines.h @@ -29,10 +29,38 @@ #endif #endif -#if (MAX_FREQ > 96000) -#define MAX_FREQ_A1 96000 +#if !defined (DSD_CHANS_DAC) +#define DSD_CHANS_DAC 0 #else -#define MAX_FREQ_A1 MAX_FREQ +#define NATIVE_DSD 1 /* Always enable Native DSD when DSD mode is enabled */ +#endif + +/* Max supported sample freq for device */ +#ifndef MAX_FREQ +#warning MAX_FREQ not defined! Using 192000 +#define MAX_FREQ (192000) +#endif + +/* Min supported sample freq for device */ +#ifndef MIN_FREQ +#warning MIN_FREQ not defined! Using 44100 +#define MIN_FREQ (44100) +#endif + +#if ((MCLK_44 % MIN_FREQ) == 0) +#define MIN_FREQ_44 MIN_FREQ +#define MIN_FREQ_48 ((48000 * 512)/((44100 * 512)/MIN_FREQ)) +#endif + +#if ((MCLK_48 % MIN_FREQ) == 0) +#define MIN_FREQ_48 MIN_FREQ +#define MIN_FREQ_44 (((44100*512)/((48000 * 512)/MIN_FREQ))*2) +#endif + +#if (MAX_FREQ > 96000) +#define MAX_FREQ_A1 96000 +#else +#define MAX_FREQ_A1 MAX_FREQ #endif /* For Audio Class 1.0 we always have at most 2 channels */ @@ -144,16 +172,11 @@ #define SPDIF_TX_INDEX (0) #endif -/* Max supported freq for device */ -#ifndef MAX_FREQ -#warning MAX_FREQ not defined! Using 48000 -#define MAX_FREQ (48000) -#endif /* Default device freq */ #ifndef DEFAULT_FREQ -#warning DEFAULT not defined! Using MAX_FREQ -#define DEFAULT_FREQ (MAX_FREQ) +#warning DEFAULT not defined! Using 48000 +#define DEFAULT_FREQ (48000) #endif /* Master clock defines (in Hz) */ diff --git a/module_usb_audio/endpoint0/audiorequests.xc b/module_usb_audio/endpoint0/audiorequests.xc index 9e1cda5a..23ee2265 100644 --- a/module_usb_audio/endpoint0/audiorequests.xc +++ b/module_usb_audio/endpoint0/audiorequests.xc @@ -790,10 +790,11 @@ int AudioClassRequests_2(XUD_ep ep0_out, XUD_ep ep0_in, USB_SetupPacket_t &sp, c { int num_freqs = 0; int i = 2; - int currentFreq44 = 44100; - int currentFreq48 = 48000; + + int currentFreq44 = MIN_FREQ_44; + int currentFreq48 = MIN_FREQ_48; unsigned maxFreq = MAX_FREQ; - + #if defined (FULL_SPEED_AUDIO_2) unsigned usbSpeed; asm("ldw %0, dp[g_curUsbSpeed]" : "=r" (usbSpeed) :); @@ -803,20 +804,21 @@ int AudioClassRequests_2(XUD_ep ep0_out, XUD_ep ep0_in, USB_SetupPacket_t &sp, c maxFreq = MAX_FREQ_A1; } #endif - + while(1) { - if(currentFreq48 <= maxFreq) + if((currentFreq48 <= maxFreq)) { /* Note i passed byref here */ - storeFreq(buffer, i, currentFreq48); - num_freqs++; - currentFreq48*=2; storeFreq(buffer, i, currentFreq44); num_freqs++; currentFreq44*=2; + + storeFreq(buffer, i, currentFreq48); + num_freqs++; + currentFreq48*=2; } - else if(currentFreq44 <= maxFreq) + else if((currentFreq44 <= maxFreq)) { storeFreq(buffer, i, currentFreq44); num_freqs++; diff --git a/module_usb_audio/main.xc b/module_usb_audio/main.xc index b7cc7cdf..8438c020 100755 --- a/module_usb_audio/main.xc +++ b/module_usb_audio/main.xc @@ -124,17 +124,17 @@ on tile[0] : in port p_mclk_in2 = PORT_MCLK_IN2; on tile[AUDIO_IO_CORE] : clock clk_audio_bclk = XS1_CLKBLK_3; /* Bit clock */ #ifdef SPDIF -on tile[AUDIO_IO_CORE] : clock clk_mst_spd = XS1_CLKBLK_1; +on tile[AUDIO_IO_CORE] : clock clk_mst_spd = XS1_CLKBLK_1; #endif /* L Series needs a port to use for USB reset */ #ifdef ARCH_L #ifdef PORT_USB_RESET /* This define is checked since it could be on a shift reg or similar */ -on tile[0] : out port p_usb_rst = PORT_USB_RESET; +on tile[0] : out port p_usb_rst = PORT_USB_RESET; #endif /* L Series also needs a clock for this port */ -clock clk = XS1_CLKBLK_4; +clock clk = XS1_CLKBLK_4; #else /* Reset port not required for SU1 due to built in Phy */ #define p_usb_rst null @@ -150,7 +150,6 @@ XUD_EpType epTypeTableOut[EP_CNT_OUT] = { XUD_EPTYPE_CTL | XUD_STATUS_ENABLE, #ifdef IAP XUD_EPTYPE_BUL | XUD_STATUS_ENABLE /* iAP */ #endif - }; XUD_EpType epTypeTableIn[EP_CNT_IN] = { XUD_EPTYPE_CTL | XUD_STATUS_ENABLE,