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Added quick hack workaround for making sure the clock port is low before a clock block is stopped

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This commit is contained in:
Ross Owen
2013-10-16 18:12:42 +01:00
parent 23ecffe691
commit 5f22f37396
1 changed files with 16 additions and 5 deletions
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19
module_usb_audio/ports/audioports.xc
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@@ -1,5 +1,6 @@
#include <xs1.h>
#include <platform.h>
#include <print.h>
#include "devicedefines.h"
#include "audioports.h"
@@ -34,12 +35,22 @@ unsigned int divide)
/* Output 0 on BCLK to ensure clock is low
* Required as stop_clock will only complete when the clock is low
*/
configure_out_port_no_ready(p_bclk, clk_audio_mclk, 0);
p_bclk <: 0;
// configure_out_port_no_ready(p_bclk, clk_audio_mclk, 0);
// p_bclk <: 0;
/* Stop bit and master clock blocks and clear port buffers */
/* Stop_clock() will not complete if the source to the clock-block is not low
* since we are switching between DSD and I2S we grab the source from the clock
* -block and set it low
*/
{
unsigned clockResId;
unsigned portResId;
asm("add %0, %1, %2": "=r"(clockResId):"r"(clk_audio_bclk), "r"(0));
portResId = getps(clockResId | (XS1_RES_PS_CLKSRC << 4) );
if(portResId !=1)
asm("out res[%0], %1":: "r"(portResId), "r"(0));
}
stop_clock(clk_audio_bclk);
//stop_clock(clk_audio_mclk);
if(!isnull(p_lrclk))
{