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USE_SW_PLL -> XUA_USE_SW_PLL

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This commit is contained in:
Ed
2024-01-19 09:25:37 +00:00
parent cb84d69231
commit 7126b91848
9 changed files with 46 additions and 46 deletions
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8
lib_xua/api/xua_buffer.h
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@@ -53,10 +53,10 @@ void XUA_Buffer(
#endif
, chanend c_aud
#if (XUA_SYNCMODE == XUA_SYNCMODE_SYNC) || defined(__DOYXGEN__)
#if (!USE_SW_PLL) || defined(__DOXYGEN__)
#if (!XUA_USE_SW_PLL) || defined(__DOXYGEN__)
, client interface pll_ref_if i_pll_ref
#endif
#if (USE_SW_PLL) || defined(__DOXYGEN__)
#if (XUA_USE_SW_PLL) || defined(__DOXYGEN__)
, chanend c_swpll_update
#endif
#endif
@@ -88,10 +88,10 @@ void XUA_Buffer_Ep(chanend c_aud_out,
, chanend c_buff_ctrl
#endif
#if (XUA_SYNCMODE == XUA_SYNCMODE_SYNC) || defined(__DOYXGEN__)
#if (!USE_SW_PLL) || defined(__DOXYGEN__)
#if (!XUA_USE_SW_PLL) || defined(__DOXYGEN__)
, client interface pll_ref_if i_pll_ref
#endif
#if (USE_SW_PLL) || defined(__DOXYGEN__)
#if (XUA_USE_SW_PLL) || defined(__DOXYGEN__)
, chanend c_swpll_update
#endif
#endif

2
lib_xua/api/xua_clocking.h
View File

@@ -40,7 +40,7 @@ void clockGen( streaming chanend ?c_spdif_rx,
chanend c_clk_ctl,
chanend c_clk_int,
chanend c_mclk_change
#if USE_SW_PLL
#if XUA_USE_SW_PLL
, port p_for_mclk_count_aud
, chanend c_sw_pll
#endif

6
lib_xua/api/xua_conf_default.h
View File

@@ -270,11 +270,11 @@
*
* Default: Enabled (for xcore.ai devices)
*/
#ifndef USE_SW_PLL
#ifndef XUA_USE_SW_PLL
#if defined(__XS3A__)
#define USE_SW_PLL (1)
#define XUA_USE_SW_PLL (1)
#else
#define USE_SW_PLL (0)
#define XUA_USE_SW_PLL (0)
#endif
#endif

2
lib_xua/doc/rst/api_defines.rst
View File

@@ -38,7 +38,7 @@ Frequencies and Clocks
.. doxygendefine:: DEFAULT_FREQ
.. doxygendefine:: MCLK_441
.. doxygendefine:: MCLK_48
.. doxygendefine:: USE_SW_PLL
.. doxygendefine:: XUA_USE_SW_PLL
Audio Class
-----------

24
lib_xua/src/core/buffer/ep/ep_buffer.xc
View File

@@ -105,7 +105,7 @@ void XUA_Buffer(
#endif
, chanend c_aud
#if (XUA_SYNCMODE == XUA_SYNCMODE_SYNC)
#if(USE_SW_PLL)
#if(XUA_USE_SW_PLL)
, chanend c_sw_pll
#else
, client interface pll_ref_if i_pll_ref
@@ -145,7 +145,7 @@ void XUA_Buffer(
, c_buff_ctrl
#endif
#if (XUA_SYNCMODE == XUA_SYNCMODE_SYNC)
#if(USE_SW_PLL)
#if(XUA_USE_SW_PLL)
, c_sw_pll
#else
, i_pll_ref
@@ -199,7 +199,7 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
, chanend c_buff_ctrl
#endif
#if (XUA_SYNCMODE == XUA_SYNCMODE_SYNC)
#if (USE_SW_PLL)
#if (XUA_USE_SW_PLL)
, chanend c_sw_pll
#else
, client interface pll_ref_if i_pll_ref
@@ -370,7 +370,7 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
#define LOCAL_CLOCK_MARGIN (1000)
#endif
#if (USE_SW_PLL)
#if (XUA_USE_SW_PLL)
/* Setup the phase frequency detector */
const unsigned controller_rate_hz = 100;
const unsigned sof_rate_hz = (AUDIO_CLASS == 1 ? 1000 : 8000);
@@ -384,7 +384,7 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
outuint(c_sw_pll, masterClockFreq);
inuint(c_sw_pll); /* receive ACK */
#else /* USE_SW_PLL */
#else /* XUA_USE_SW_PLL */
timer t_sofCheck;
unsigned timeLastEdge;
unsigned timeNextEdge;
@@ -480,7 +480,7 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
{
masterClockFreq = MCLK_441;
}
#if (XUA_SYNCMODE == XUA_SYNCMODE_SYNC && USE_SW_PLL)
#if (XUA_SYNCMODE == XUA_SYNCMODE_SYNC && XUA_USE_SW_PLL)
sw_pll_pfd_init(&sw_pll_pfd,
sof_rate_hz / controller_rate_hz, /* How often the PFD is invoked */
masterClockFreq / sof_rate_hz, /* pll ratio integer */
@@ -488,7 +488,7 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
2000);
restart_sigma_delta(c_sw_pll, masterClockFreq);
#endif /* (XUA_SYNCMODE == XUA_SYNCMODE_SYNC && USE_SW_PLL) */
#endif /* (XUA_SYNCMODE == XUA_SYNCMODE_SYNC && XUA_USE_SW_PLL) */
}
#endif /* (MAX_FREQ != MIN_FREQ) */
/* Ideally we want to wait for handshake (and pass back up) here. But we cannot keep this
@@ -548,7 +548,7 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
}
break;
}
#if (XUA_SYNCMODE == XUA_SYNCMODE_SYNC) && (!USE_SW_PLL)
#if (XUA_SYNCMODE == XUA_SYNCMODE_SYNC) && (!XUA_USE_SW_PLL)
case t_sofCheck when timerafter(timeNextEdge) :> void:
i_pll_ref.toggle();
timeLastEdge = timeNextEdge;
@@ -580,14 +580,14 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
{
sofCount = 0;
pllUpdate++;
#if (!USE_SW_PLL)
#if (!XUA_USE_SW_PLL)
/* Port is accessed via interface to allow flexibilty with location */
i_pll_ref.toggle();
t_sofCheck :> timeLastEdge;
timeNextEdge = timeLastEdge + LOCAL_CLOCK_INCREMENT + LOCAL_CLOCK_MARGIN;
#endif
}
#if (USE_SW_PLL)
#if (XUA_USE_SW_PLL)
// Update PLL @ 100Hz
if(pllUpdate == 10)
{
@@ -1030,14 +1030,14 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
break;
#endif /* ifdef MIDI */
#if ((XUA_SYNCMODE == XUA_SYNCMODE_SYNC) && USE_SW_PLL)
#if ((XUA_SYNCMODE == XUA_SYNCMODE_SYNC) && XUA_USE_SW_PLL)
/* This is fired when sw_pll has completed initialising a new mclk_rate */
case inuint_byref(c_sw_pll, u_tmp):
printstr("SWPLL synch\n");
//TODO - hold off audio until we get this ACK
break;
#endif /* ((XUA_SYNCMODE == XUA_SYNCMODE_SYNC) && USE_SW_PLL) */
#endif /* ((XUA_SYNCMODE == XUA_SYNCMODE_SYNC) && XUA_USE_SW_PLL) */
#ifdef IAP
/* Received word from iap thread - Check for ACK or Data */

22
lib_xua/src/core/clocking/clockgen.xc
View File

@@ -199,7 +199,7 @@ static inline int validSamples(Counter &counter, int clockIndex)
}
#endif
#if USE_SW_PLL
#if XUA_USE_SW_PLL
unsafe
{
unsigned * unsafe selected_mclk_rate_ptr = NULL;
@@ -223,7 +223,7 @@ void clockGen ( streaming chanend ?c_spdif_rx,
chanend c_clk_ctl,
chanend c_clk_int,
chanend c_mclk_change
#if USE_SW_PLL
#if XUA_USE_SW_PLL
, port p_for_mclk_count_aud
, chanend c_sw_pll
#endif
@@ -246,7 +246,7 @@ void clockGen ( streaming chanend ?c_spdif_rx,
timer t_external;
unsigned selected_mclk_rate = MCLK_48; // Assume 24.576MHz initial clock
unsigned selected_sample_rate = 0;
#if USE_SW_PLL
#if XUA_USE_SW_PLL
unsigned mclks_per_sample = 0;
unsigned short mclk_time_stamp = 0;
@@ -345,7 +345,7 @@ void clockGen ( streaming chanend ?c_spdif_rx,
/* Initial ref clock output and get timestamp */
i_pll_ref.init();
#if ((XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && USE_SW_PLL)
#if ((XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && XUA_USE_SW_PLL)
int reset_sw_pll_pfd = 1;
int require_ack_to_audio = 0;
restart_sigma_delta(c_sw_pll, MCLK_48); /* default to 48kHz - this will be reset shortly when host selects rate */
@@ -468,7 +468,7 @@ void clockGen ( streaming chanend ?c_spdif_rx,
/* Generate local clock from timer */
case t_local when timerafter(timeNextEdge) :> void:
#if USE_SW_PLL
#if XUA_USE_SW_PLL
/* Do nothing - hold the most recent sw_pll setting */
#else
/* Setup next local clock edge */
@@ -519,7 +519,7 @@ void clockGen ( streaming chanend ?c_spdif_rx,
break;
#endif
#if ((XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && USE_SW_PLL)
#if ((XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && XUA_USE_SW_PLL)
case inuint_byref(c_sw_pll, tmp):
/* Send ACK back to audiohub to allow I2S to start
This happens only on SDM restart and only once */
@@ -535,7 +535,7 @@ void clockGen ( streaming chanend ?c_spdif_rx,
/* Receive notification of audio streaming settings change and store */
case c_mclk_change :> selected_mclk_rate:
c_mclk_change :> selected_sample_rate;
#if USE_SW_PLL
#if XUA_USE_SW_PLL
mclks_per_sample = selected_mclk_rate / selected_sample_rate;
restart_sigma_delta(c_sw_pll, selected_mclk_rate);
reset_sw_pll_pfd = 1;
@@ -552,7 +552,7 @@ void clockGen ( streaming chanend ?c_spdif_rx,
/* Receive sample from S/PDIF RX thread (streaming chan) */
case c_spdif_rx :> spdifRxData:
#if USE_SW_PLL
#if XUA_USE_SW_PLL
/* Record time of sample */
asm volatile(" getts %0, res[%1]" : "=r" (mclk_time_stamp) : "r" (p_for_mclk_count_aud));
#endif
@@ -625,7 +625,7 @@ void clockGen ( streaming chanend ?c_spdif_rx,
/* Setup for next edge */
timeNextEdge = spdifRxTime + LOCAL_CLOCK_INCREMENT + LOCAL_CLOCK_MARGIN;
#if USE_SW_PLL
#if XUA_USE_SW_PLL
do_sw_pll_phase_frequency_detector_dig_rx( mclk_time_stamp,
mclks_per_sample,
c_sw_pll,
@@ -646,7 +646,7 @@ void clockGen ( streaming chanend ?c_spdif_rx,
/* receive sample from ADAT rx thread (streaming channel with CT_END) */
case inuint_byref(c_adat_rx, tmp):
#if USE_SW_PLL
#if XUA_USE_SW_PLL
/* record time of sample */
asm volatile(" getts %0, res[%1]" : "=r" (mclk_time_stamp) : "r" (p_for_mclk_count_aud));
#endif
@@ -742,7 +742,7 @@ void clockGen ( streaming chanend ?c_spdif_rx,
/* Setup for next edge */
timeNextEdge = adatReceivedTime + LOCAL_CLOCK_INCREMENT + LOCAL_CLOCK_MARGIN;
#if USE_SW_PLL
#if XUA_USE_SW_PLL
do_sw_pll_phase_frequency_detector_dig_rx( mclk_time_stamp,
mclks_per_sample,
c_sw_pll,

4
lib_xua/src/core/clocking/sw_pll_wrapper.h
View File

@@ -6,7 +6,7 @@
#include "xua.h"
#if USE_SW_PLL
#if XUA_USE_SW_PLL
extern "C"
{
#include "sw_pll.h"
@@ -53,5 +53,5 @@ void do_sw_pll_phase_frequency_detector_dig_rx( unsigned short mclk_time_stamp,
* returns The SDM update interval in ticks and the initial DCO setting for nominal frequency */
{unsigned, unsigned} InitSWPLL(sw_pll_state_t &sw_pll, unsigned mClk);
#endif /* USE_SW_PLL */
#endif /* XUA_USE_SW_PLL */
#endif /* _SW_PLL_WRAPPPER_H_ */

4
lib_xua/src/core/clocking/sw_pll_wrapper.xc
View File

@@ -7,7 +7,7 @@
#include "sw_pll_wrapper.h"
#include "xua.h"
#if USE_SW_PLL
#if XUA_USE_SW_PLL
{unsigned, unsigned} init_sw_pll(sw_pll_state_t &sw_pll, unsigned mClk)
@@ -192,4 +192,4 @@ void restart_sigma_delta(chanend c_sw_pll, unsigned selected_mclk_rate)
outuint(c_sw_pll, selected_mclk_rate);
}
#endif /* USE_SW_PLL */
#endif /* XUA_USE_SW_PLL */

20
lib_xua/src/core/main.xc
View File

@@ -315,7 +315,7 @@ void usb_audio_io(chanend ?c_aud_in,
#if (XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN)
, client interface pll_ref_if i_pll_ref
#endif
#if ((XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && USE_SW_PLL)
#if ((XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && XUA_USE_SW_PLL)
, port p_for_mclk_count_aud
, chanend c_sw_pll
#endif
@@ -329,13 +329,13 @@ void usb_audio_io(chanend ?c_aud_in,
chan c_dig_rx;
chan c_mclk_change; /* Notification of new mclk freq to clockgen */
#if USE_SW_PLL
#if XUA_USE_SW_PLL
/* Connect p_for_mclk_count_aud to clk_audio_mclk so we can count mclks/timestamp in digital rx*/
unsigned x = 0;
asm("ldw %0, dp[clk_audio_mclk]":"=r"(x));
asm("setclk res[%0], %1"::"r"(p_for_mclk_count_aud), "r"(x));
#endif /* USE_SW_PLL */
#endif /* XUA_USE_SW_PLL */
#endif /* (XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) */
#if (XUA_NUM_PDM_MICS > 0) && (PDM_TILE == AUDIO_IO_TILE)
@@ -409,7 +409,7 @@ void usb_audio_io(chanend ?c_aud_in,
c_clk_ctl,
c_clk_int,
c_mclk_change
#if USE_SW_PLL
#if XUA_USE_SW_PLL
, p_for_mclk_count_aud
, c_sw_pll
#endif
@@ -490,11 +490,11 @@ int main()
#endif
#endif
#if (((XUA_SYNCMODE == XUA_SYNCMODE_SYNC && !USE_SW_PLL) || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) )
#if (((XUA_SYNCMODE == XUA_SYNCMODE_SYNC && !XUA_USE_SW_PLL) || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) )
interface pll_ref_if i_pll_ref;
#endif
#if ((XUA_SYNCMODE == XUA_SYNCMODE_SYNC || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && USE_SW_PLL)
#if ((XUA_SYNCMODE == XUA_SYNCMODE_SYNC || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && XUA_USE_SW_PLL)
chan c_sw_pll;
#endif
chan c_sof;
@@ -518,7 +518,7 @@ int main()
{
USER_MAIN_CORES
#if (((XUA_SYNCMODE == XUA_SYNCMODE_SYNC && !USE_SW_PLL) || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN))
#if (((XUA_SYNCMODE == XUA_SYNCMODE_SYNC && !XUA_USE_SW_PLL) || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN))
on tile[PLL_REF_TILE]: PllRefPinTask(i_pll_ref, p_pll_ref);
#endif
on tile[XUD_TILE]:
@@ -589,7 +589,7 @@ int main()
#endif
, c_mix_out
#if (XUA_SYNCMODE == XUA_SYNCMODE_SYNC)
#if (!USE_SW_PLL)
#if (!XUA_USE_SW_PLL)
, i_pll_ref
#else
, c_sw_pll
@@ -608,7 +608,7 @@ int main()
#endif /* XUA_USB_EN */
}
#if ((XUA_SYNCMODE == XUA_SYNCMODE_SYNC || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && USE_SW_PLL)
#if ((XUA_SYNCMODE == XUA_SYNCMODE_SYNC || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && XUA_USE_SW_PLL)
on tile[AUDIO_IO_TILE]: sw_pll_task(c_sw_pll);
#endif
@@ -632,7 +632,7 @@ int main()
#if (XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN)
, i_pll_ref
#endif
#if ((XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && USE_SW_PLL)
#if ((XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && XUA_USE_SW_PLL)
, p_for_mclk_count_audio
, c_sw_pll
#endif