From fdc907cd457de9ce356c18107508a094e86fb3f4 Mon Sep 17 00:00:00 2001 From: Ross Owen Date: Fri, 16 Nov 2012 16:43:54 +0000 Subject: [PATCH] Reboot command tidyup --- module_usb_audio/audio.xc | 8 ++++---- module_usb_audio/reboot.xc | 42 ++++++++++++++------------------------ 2 files changed, 19 insertions(+), 31 deletions(-) diff --git a/module_usb_audio/audio.xc b/module_usb_audio/audio.xc index fba9d51c..e8164fe0 100755 --- a/module_usb_audio/audio.xc +++ b/module_usb_audio/audio.xc @@ -553,12 +553,12 @@ void audio(chanend c_mix_out, chanend ?c_dig_rx, chanend ?c_config, chanend ?c) unsigned int vals[NUMBER_WORDS]; int cnt = 0; int div; - unsigned val = 0; - int val2 = 0; - int adcOk = 0; + unsigned val = 0; + int val2 = 0; + int adcOk = 0; /* Enable adc on channel */ - enable_xs1_su_adc_input(0, c); + enable_xs1_su_adc_input(0, c); /* General ADC control (enabled, 1 samples per packet, 32 bits per sample) */ data[0] = 0x10201; diff --git a/module_usb_audio/reboot.xc b/module_usb_audio/reboot.xc index 5147dd20..c18d9622 100644 --- a/module_usb_audio/reboot.xc +++ b/module_usb_audio/reboot.xc @@ -1,43 +1,31 @@ #include -#include -#define GLXID 0x0001 -#define XS1_GLX_PERIPH_USB_ID 0x1 -#define XS1_GLX_CFG_RST_MISC_ADRS 0x50 -#define XS1_UIFM_PHY_CONTROL_REG 0x3c -#define XS1_UIFM_PHY_CONTROL_FORCERESET 0x0 -#define XS1_GLX_CFG_USB_CLK_EN_BASE 0x3 -#define XS1_GLX_CFG_USB_EN_BASE 0x2 -#define XS1_GLX_PERIPH_SCTH_ID 0x3 +#include +#include - -#define XS1_UIFM_FUNC_CONTROL_REG 0xc -#define XS1_UIFM_FUNC_CONTROL_XCVRSELECT 0x0 -#define XS1_UIFM_FUNC_CONTROL_TERMSELECT 0x1 -int write_sswitch_reg_blind(unsigned coreid, unsigned reg, unsigned data); -void write_sswitch_reg_verify(unsigned coreid, unsigned reg, unsigned data, unsigned failval); -int write_glx_periph_word(unsigned destId, unsigned periphAddress, unsigned destRegAddr, unsigned data); -int write_glx_periph_reg(unsigned dest_id, unsigned periph_addr, unsigned dest_reg_addr, unsigned bad_packet, unsigned data_size, char buf[]); -void read_sswitch_reg_verify(unsigned coreid, unsigned reg, unsigned &data, unsigned failval); +#define XS1_SU_PERIPH_USB_ID 0x1 /* Reboots XMOS device by writing to the PLL config register */ void device_reboot_implementation(chanend spare) { #ifdef ARCH_S /* Disconnect from bus */ - write_glx_periph_word(GLXID, XS1_GLX_PERIPH_USB_ID, XS1_UIFM_FUNC_CONTROL_REG, 4); + unsigned data[] = {4}; + write_periph_32(xs1_su, XS1_SU_PERIPH_USB_ID, XS1_SU_PER_UIFM_FUNC_CONTROL_NUM, 1, data); #endif - outct(spare, XS1_CT_END); // have to do this before freeing the chanend - inct(spare); // Receive end ct from usb_buffer to close down in both directions + outct(spare, XS1_CT_END); // have to do this before freeing the chanend + inct(spare); // Receive end ct from usb_buffer to close down in both directions + // Need a spare chanend so we can talk to the pll register asm("freer res[%0]"::"r"(spare)); + { unsigned int pllVal; - unsigned int core_id = get_core_id(); - read_sswitch_reg(core_id, 6, pllVal); - write_sswitch_reg_blind(core_id^0x8000, 6, pllVal); - write_sswitch_reg_blind(core_id, 6, pllVal); - } + unsigned int tile_id = get_local_tile_id(); + read_sswitch_reg(tile_id, 6, pllVal); - + /* Not this accounts for 2 tiles of an L2.. */ + write_sswitch_reg_no_ack(tile_id^0x8000, 6, pllVal); + write_sswitch_reg_no_ack(tile_id, 6, pllVal); + } }