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Code Pull Requests Activity
783 Commits 5 Branches 29 Tags
a714e668020fe14128b213eae7ea3290d4ddf28a
Commit Graph

60 Commits

Author SHA1 Message Date
Ross Owen
d7f0cdd4be Potential fixes to master mode 2014-05-27 15:31:32 +01:00
Ross Owen
ccf7c66588 Sample shift up after volume macs no longer done in audio(). Now done in mixer(). This allows lower bits to be properly retained for 32bit (and DSD native) 2014-05-20 17:18:01 +01:00
Ross Owen
8966f5db59 xpd: Cleaned up whitespace 2014-04-14 14:00:43 +01:00
Ross Owen
671552767d Audio core now takes SET_STREAM_FORMAT_OUT command (rather than SET_DSD_MODE). It also accepts a sample resolution where appropriate. Deliver() also now has single return value. 2014-04-10 11:57:22 +01:00
Ross Owen
1b78f3f861 Temp removed interaction between audio() and clockgen() 2014-03-28 12:20:39 +00:00
Ross Owen
bbd02f157f Fixed SPDIF build issue 2014-01-27 16:28:43 +00:00
Ross Owen
f495005396 Removed unused var and func warnings. 2014-01-27 16:23:54 +00:00
Ross Owen
b2660cf04e Another crack the the master mode LR swap issue. 2014-01-23 17:59:26 +00:00
Ross Owen
ede82cd818 Attempt to fix up CODEC_MASTER output LR swap (introduced when input init made more robust) 2014-01-23 12:37:25 +00:00
Ross Owen
cfe9f508f1 Removed old README and comment only 2014-01-22 16:09:37 +00:00
Ross Owen
062e06df97 Improved the robustness of ADC I2S data port init in MASTER_CODEC mode 2014-01-22 15:59:56 +00:00
dan
98b3bdba95 added toplevel makefile for xpd 2014-01-22 11:00:41 +00:00
Ross Owen
e82bae44ad Moved initial bclk setting high to before ADC clrbuff. 2014-01-21 12:47:05 +00:00
Ross Owen
fa78990f12 Comment only 2014-01-21 12:38:46 +00:00
Ross Owen
8712acb539 deliver thread no longer waits for AUDIO_PLL_LOCK_DELAY - this was causing pop issues on rate change as DAC has mclk but no bclk/lrclk. This seems to cause issues. This delay now added to audio SF change in EP0 for safety. Related to BUG #14769 2014-01-20 18:13:54 +00:00
Ross Owen
e53de21f7a DSD native mode now outputs mute pattern on invalid freq. Previously only output clks. Helps with pop issue when changing pcm/dsd versions in foobar. (BUG #14769) 2014-01-20 18:11:50 +00:00
Ross Owen
0da282dd1c deliver now sets bclk/dsd clk initial high. This was previously done in port config. 2014-01-20 18:10:14 +00:00
Ross Owen
7c4b7a702b Removed debug #error 2014-01-16 17:56:45 +00:00
Ross Owen
1022f7d5c6 Fixed build issue when CODEC_MASTER defined (BUG #15162) 2014-01-16 17:31:28 +00:00
Ross Owen
70276c3237 Fixed build issue when NUM_USB_CHAN_IN or NUM_USB_CHAN_OUT set to 0 and MIXER set to 1 (#15096) 2014-01-15 17:22:28 +00:00
Ross Owen
1fa6e99473 Conflicted merge in mixer 2013-12-12 11:50:32 +00:00
Richard Osborne
577b5f500d Make functions static where possible, no intended functionality change. 
This saves 208 bytes.
 2013-12-09 18:09:18 +00:00
Ross Owen
1ce3c74ebc Deliver to/from mixer comms fixed up for new underflow protocol 2013-12-09 15:49:50 +00:00
Ross Owen
17e668b33d Whitespace and intentation tidy 2013-11-28 12:02:07 +00:00
Ross Owen
4cb49147db deliver() now takes curSamFreq param. This is checked to be a valid DoP frequency before moving to DoP mode. 2013-11-14 15:43:11 +00:00
Ross Owen
dfe5a47fcf Added setting clocks low on first sample check 2013-11-05 16:39:23 +00:00
Ross Owen
e4f7597575 Removed print.h 2013-10-29 12:02:17 +00:00
Ross Owen
f00629f469 Added doI2SClocks function and checks for MAX_DIVIDE 2013-10-29 11:52:17 +00:00
Ross Owen
84c267bac8 Removed enum DsdMode as bit of a pain for non-dsd users 2013-10-24 10:55:49 +01:00
Ross Owen
60c04400ac Fixing up build issues related to dsdMode 2013-10-24 10:50:44 +01:00
Ross Owen
f0f9c1ecdb Tidy up clockcmds header 2013-10-23 17:20:16 +01:00
Ross Owen
d74bd15ed4 DSD freq to audiohwconfig() tidyup and generic divide calc 2013-10-23 12:29:11 +01:00
Ross Owen
6c5253abb0 A more elegant solution to the DSD stop_clock() pausing issue. Just set ALL clocks to 0 before deliver returns 2013-10-16 19:09:21 +01:00
Ross Owen
4fbca6871b Tidied up DSD clock divide 2013-10-16 18:07:37 +01:00
Ross Owen
8ce31a4e35 Deliver handles underflow 2013-09-18 14:51:24 +01:00
Ross Owen
f201614224 MCLK clockblock now configed and started in audio, not in configAudioPorts. It is now never stopped since this caused issues with FB when moving to/from DoP mode 2013-09-09 23:39:34 +01:00
Ross Owen
ea5cc2860a whitespace only 2013-09-06 18:17:08 +01:00
Ross Owen
429de9a8b4 Exit DoP on any command 2013-09-06 16:51:17 +01:00
Ross Owen
c94991649a reversed DSD mute bytes 2013-09-06 14:24:42 +01:00
Ross Owen
bb14b6018d First DSD 16 samples were being output as all 1 2013-09-06 14:21:46 +01:00
Ross Owen
04dd2a2a05 Improving clicks entering/leaving DoP mode 2013-09-05 23:18:34 +01:00
Ross Owen
1e33bf819d Changes to support DSD Native mode 2013-08-23 14:23:37 +01:00
Ross Owen
f84f82d5ae Fix to DSD_CHANS_DAC guard 2013-07-16 17:06:58 +01:00
Ross Owen
e2906b7eb2 Fixed up input only build 2013-07-09 17:27:45 +01:00
Ross Owen
1e8faf3a5e dsd port updates 2013-06-28 12:44:36 +01:00
Ross Owen
7c97fbdb82 More work on DSD - work in progress 2013-06-18 15:24:36 +01:00
Ross Owen
5adbe0c4a6 Working to add generic DSD support 2013-05-28 17:24:40 +01:00
Ross Owen
db10432674 Working on getting DSD operational 2013-05-15 12:45:46 +01:00
Ross Owen
9dd8498d38 Removed debug LED output 2013-05-14 14:05:30 +01:00
Ross Owen
c0398c33fe Looking at 384khz issues 2013-05-10 16:17:40 +01:00