forked from PAWPAW-Mirror/lib_xua
73 lines
2.7 KiB
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73 lines
2.7 KiB
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Synchronisation
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===============
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The codebase supports "Synchronous" and "Asynchronous" modes for USB transfer as defined by the
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USB specification(s).
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Asynchronous mode (``XUA_SYNCMODE_ASYNC``) has the advantage that the device is clock-master. This means that
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a high-quality local master-clock source can be utilised. It also has the benefit that the device may
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synchronise it's master clock to an external digital input stream e.g. S/PDIF and thus avoiding sample-rate
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conversion.
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The drawback of this mode is that it burdens the host with syncing to the device which some hosts
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may not support. This is especially pertinent to embedded hosts, however, most PC's and mobile devices
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will indeed support this mode.
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Synchronous mode (``XUA_SYNCMODE_SYNC``) is an option if the target host does not support asynchronous mode
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or if it is desirable to synchronise many devices to a single host. It should be noted, however, that input
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from digital streams, such as S/PDIF, are not currently supported in this mode.
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.. note::
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The selection of synchronisation mode is done at build time and cannot be changed dynamically.
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Setting the synchronisation mode of the device is done using the define in :ref:`opt_sync_defines`
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.. _opt_sync_defines:
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.. list-table:: Sync Define
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:header-rows: 1
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:widths: 20 80 20
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* - Define
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- Description
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- Default
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* - ``XUA_SYNCMODE``
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- USB synchronisation mode
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- ``XUA_SYNCMODE_ASYNC``
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When operating in synchronous mode a local master clock must be generated that is synchronised to the incoming
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SoF rate from USB. Either an external Cirrus Logic CS2100 device is required for this purpose
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or, on xcore.ai devices, the on-chip application PLL may be used via lib_sw_pll.
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In the case of using the CS2100, the codebase expects to drive a synchronisation signal to this external device
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as a reference.
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The programmer should ensure the define in :ref:`opt_sync_ref_defines` is set appropriately.
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.. _opt_sync_ref_defines:
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.. list-table:: Reference clock location
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:header-rows: 1
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:widths: 20 80 20
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* - Define
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- Description
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- Default
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* - ``PLL_REF_TILE``
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- Tile location of reference to CS2100 device
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- ``AUDIO_IO_TILE``
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* - ``XUA_USE_SW_PLL``
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- Whether or not to use sw_pll to recover the clock (xcore.ai only)
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- 1 for xcore.ai targets. May be overridden to 0 in ``xua_conf.h``
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The codebase expects the CS2100 reference signal port to be defined in the application XN file as ``PORT_PLL_REF``.
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This may be a port of any bit-width, however, connection to bit[0] is assumed::
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<Port Location="XS1_PORT_1A" Name="PORT_PLL_REF"/>
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Configuration of the external CS2100 device (typically via I2C) is beyond the scope of this document.
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