forked from PAWPAW-Mirror/lib_xua
720 lines
22 KiB
ArmAsm
720 lines
22 KiB
ArmAsm
#########################################################
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# XMOS Compiled Assembly File #
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#########################################################
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# generated: Fri Jan 06 2012, 16:13 #
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# product: XS1-040 #
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# compiler: XMOS 32-bit XC Compiler 11.11.0beta1 (build 2136)#
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# input: reboot.xi #
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# output: reboot.s #
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#########################################################
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.file "../../../sc_usb_audio/module_usb_aud_shared/reboot.xc"
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.text
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.align 2
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.LDBG0:
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.section .debug_line, "", @progbits
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.LDBG1:
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.section .debug_frame, "", @progbits
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.align 4
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.LDBG2:
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.int .LDBG4-.LDBG3
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.LDBG3:
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.int 0xffffffff
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.byte 0x03
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.byte 0x00
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.uleb128 0x2
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.sleb128 0xfffffffc
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.uleb128 0xf
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.byte 0x0c
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.uleb128 0xe
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.uleb128 0x0
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.byte 0x07
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.uleb128 0x0
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.byte 0x07
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.uleb128 0x1
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.byte 0x07
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.uleb128 0x2
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.byte 0x07
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.uleb128 0x3
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.byte 0x08
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.uleb128 0x4
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.byte 0x08
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.uleb128 0x5
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.byte 0x08
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.uleb128 0x6
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.byte 0x08
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.uleb128 0x7
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.byte 0x08
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.uleb128 0x8
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.byte 0x08
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.uleb128 0x9
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.byte 0x08
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.uleb128 0xa
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.byte 0x07
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.uleb128 0xb
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.byte 0x08
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.uleb128 0xc
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.byte 0x08
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.uleb128 0xd
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.byte 0x08
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.uleb128 0xe
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.byte 0x08
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.uleb128 0xf
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.align 4, 0
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.LDBG4:
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.extern configure_in_port_handshake, "f{0}(w:p,i:p,o:p,ck)"
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.extern configure_out_port_handshake, "f{0}(w:p,i:p,o:p,ck,ui)"
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.extern configure_in_port_strobed_master, "f{0}(w:p,o:p,:ck)"
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.extern configure_out_port_strobed_master, "f{0}(w:p,o:p,:ck,ui)"
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.extern configure_in_port_strobed_slave, "f{0}(w:p,i:p,ck)"
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.extern configure_out_port_strobed_slave, "f{0}(w:p,i:p,ck,ui)"
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.extern configure_in_port, "f{0}(w:p,:ck)"
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.extern configure_out_port, "f{0}(w:p,:ck,ui)"
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.extern configure_port_clock_output, "f{0}(w:p,:ck)"
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.extern start_port, "f{0}(w:p)"
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.extern stop_port, "f{0}(w:p)"
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.extern configure_clock_src, "f{0}(ck,w:p)"
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.extern configure_clock_ref, "f{0}(ck,uc)"
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.extern configure_clock_rate, "f{0}(ck,ui,ui)"
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.extern configure_clock_rate_at_least, "f{0}(ck,ui,ui)"
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.extern configure_clock_rate_at_most, "f{0}(ck,ui,ui)"
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.extern set_clock_src, "f{0}(ck,w:p)"
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.extern set_clock_ref, "f{0}(ck)"
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.extern set_clock_div, "f{0}(ck,uc)"
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.extern set_clock_rise_delay, "f{0}(ck,ui)"
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.extern set_clock_fall_delay, "f{0}(ck,ui)"
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.extern set_port_clock, "f{0}(w:p,:ck)"
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.extern set_port_ready_src, "f{0}(w:p,w:p)"
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.extern set_clock_ready_src, "f{0}(ck,w:p)"
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.extern set_clock_on, "f{0}(ck)"
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.extern set_clock_off, "f{0}(ck)"
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.extern start_clock, "f{0}(ck)"
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.extern stop_clock, "f{0}(ck)"
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.extern set_port_use_on, "f{0}(w:p)"
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.extern set_port_use_off, "f{0}(w:p)"
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.extern set_port_mode_data, "f{0}(w:p)"
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.extern set_port_mode_clock, "f{0}(w:p)"
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.extern set_port_mode_ready, "f{0}(w:p)"
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.extern set_port_drive, "f{0}(w:p)"
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.extern set_port_drive_low, "f{0}(w:p)"
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.extern set_port_pull_up, "f{0}(w:p)"
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.extern set_port_pull_down, "f{0}(w:p)"
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.extern set_port_pull_none, "f{0}(w:p)"
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.extern set_port_master, "f{0}(w:p)"
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.extern set_port_slave, "f{0}(w:p)"
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.extern set_port_no_ready, "f{0}(w:p)"
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.extern set_port_strobed, "f{0}(w:p)"
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.extern set_port_handshake, "f{0}(w:p)"
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.extern set_port_no_sample_delay, "f{0}(w:p)"
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.extern set_port_sample_delay, "f{0}(w:p)"
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.extern set_port_no_inv, "f{0}(w:p)"
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.extern set_port_inv, "f{0}(w:p)"
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.extern set_port_shift_count, "f{0}(w:p,ui)"
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.extern set_pad_delay, "f{0}(w:p,ui)"
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.extern set_thread_fast_mode_on, "f{0}(0)"
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.extern set_thread_fast_mode_off, "f{0}(0)"
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.extern start_streaming_slave, "f{0}(chd)"
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.extern start_streaming_master, "f{0}(chd)"
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.extern stop_streaming_slave, "f{0}(chd)"
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.extern stop_streaming_master, "f{0}(chd)"
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.extern outuchar, "f{0}(chd,uc)"
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.extern outuint, "f{0}(chd,ui)"
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.extern inuchar, "f{uc}(chd)"
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.extern inuint, "f{ui}(chd)"
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.extern inuchar_byref, "f{0}(chd,&(uc))"
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.extern inuint_byref, "f{0}(chd,&(ui))"
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.extern sync, "f{0}(w:p)"
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.extern peek, "f{ui}(w:p)"
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.extern clearbuf, "f{0}(w:p)"
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.extern endin, "f{ui}(w:p)"
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.extern partin, "f{ui}(w:p,ui)"
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.extern partout, "f{0}(w:p,ui,ui)"
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.extern partout_timed, "f{ui}(w:p,ui,ui,ui)"
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.extern partin_timestamped, "f{ui,ui}(w:p,ui)"
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.extern partout_timestamped, "f{ui}(w:p,ui,ui)"
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.extern outct, "f{0}(chd,uc)"
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.extern chkct, "f{0}(chd,uc)"
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.extern inct, "f{uc}(chd)"
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.extern inct_byref, "f{0}(chd,&(uc))"
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.extern testct, "f{si}(chd)"
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.extern testwct, "f{si}(chd)"
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.extern soutct, "f{0}(m:chd,uc)"
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.extern schkct, "f{0}(m:chd,uc)"
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.extern sinct, "f{uc}(m:chd)"
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.extern sinct_byref, "f{0}(m:chd,&(uc))"
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.extern stestct, "f{si}(m:chd)"
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.extern stestwct, "f{si}(m:chd)"
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.extern out_char_array, "ft{0}(chd,&(a(:c:uc)),ui)"
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.extern in_char_array, "ft{0}(chd,&(a(:uc)),ui)"
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.extern crc32, "f{0}(&(ui),ui,ui)"
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.extern crc8shr, "f{ui}(&(ui),ui,ui)"
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.extern lmul, "f{ui,ui}(ui,ui,ui,ui)"
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.extern mac, "f{ui,ui}(ui,ui,ui,ui)"
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.extern macs, "f{si,ui}(si,si,si,ui)"
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.extern sext, "f{si}(ui,ui)"
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.extern zext, "f{ui}(ui,ui)"
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.extern pinseq, "f{0}(ui)"
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.extern pinsneq, "f{0}(ui)"
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.extern pinseq_at, "f{0}(ui,ui)"
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.extern pinsneq_at, "f{0}(ui,ui)"
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.extern timerafter, "f{0}(ui)"
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.extern getps, "f{ui}(ui)"
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.extern setps, "f{0}(ui,ui)"
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.extern read_pswitch_reg, "f{si}(ui,ui,&(ui))"
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.extern read_sswitch_reg, "f{si}(ui,ui,&(ui))"
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.extern write_pswitch_reg, "f{si}(ui,ui,ui)"
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.extern write_pswitch_reg_no_ack, "f{si}(ui,ui,ui)"
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.extern write_sswitch_reg, "f{si}(ui,ui,ui)"
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.extern write_sswitch_reg_no_ack, "f{si}(ui,ui,ui)"
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.extern read_node_config_reg, "f{si}(cr,ui,&(ui))"
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.extern write_node_config_reg, "f{si}(cr,ui,ui)"
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.extern write_node_config_reg_no_ack, "f{si}(cr,ui,ui)"
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.extern read_periph_8, "f{si}(cr,ui,ui,ui,&(a(:uc)))"
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.extern write_periph_8, "f{si}(cr,ui,ui,ui,&(a(:c:uc)))"
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.extern write_periph_8_no_ack, "f{si}(cr,ui,ui,ui,&(a(:c:uc)))"
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.extern read_periph_32, "f{si}(cr,ui,ui,ui,&(a(:ui)))"
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.extern write_periph_32, "f{si}(cr,ui,ui,ui,&(a(:c:ui)))"
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.extern write_periph_32_no_ack, "f{si}(cr,ui,ui,ui,&(a(:c:ui)))"
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.extern get_core_id, "f{ui}(0)"
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.extern get_thread_id, "f{ui}(0)"
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.extern __builtin_getid, "f{si}(0)"
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.extern printchar, "f{si}(uc)"
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.extern printcharln, "f{si}(uc)"
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.extern printint, "f{si}(si)"
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.extern printintln, "f{si}(si)"
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.extern printuint, "f{si}(ui)"
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.extern printuintln, "f{si}(ui)"
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.extern printhex, "f{si}(ui)"
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.extern printhexln, "f{si}(ui)"
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.extern printstr, "f{si}(&(a(:c:uc)))"
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.extern printstrln, "f{si}(&(a(:c:uc)))"
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.extern write_sswitch_reg_blind, "f{si}(ui,ui,ui)"
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.text
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.cc_top device_reboot.function,device_reboot
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.align 4
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.LDBG5:
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.call device_reboot, get_core_id
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.call device_reboot, read_sswitch_reg
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.call device_reboot, write_sswitch_reg_blind
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.call device_reboot, write_sswitch_reg_blind
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.globl device_reboot, "f{0}(chd)"
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.globl device_reboot.nstackwords
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.globl device_reboot.maxthreads
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.globl device_reboot.maxtimers
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.globl device_reboot.maxchanends
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.globl device_reboot.maxsync
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.type device_reboot, @function
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.linkset device_reboot.locnoside, 1
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.linkset device_reboot.locnochandec, 1
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.linkset .LLNK4, get_core_id.nstackwords $M read_sswitch_reg.nstackwords
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.linkset .LLNK3, .LLNK4 $M write_sswitch_reg_blind.nstackwords
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.linkset .LLNK2, .LLNK3 $M write_sswitch_reg_blind.nstackwords
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.linkset .LLNK1, .LLNK2 $M .LLNK2
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.linkset .LLNK0, .LLNK1 + 3
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.linkset device_reboot.nstackwords, .LLNK0
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.LDBG11:
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.LDBG8:
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################
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# Entry to function `device_reboot' (Implied thread 0)
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################
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# STACK
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# -------|-workspace------
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# -----2-| pllVal
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# -----1-| _t0
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# -----0-| rsvd
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# ------------------------
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# r0 = [f:spare, l:core_id, t:8, t:9, t:10, t:12, t:13, t:14, t:15, t:17, t:18, t:19, t:22]
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# r1 = [t:21, t:23, t:24]
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# r2 = [t:11, t:16, t:20]
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# r4 = [t:7]
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# r5 = [t:1]
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# r6 = [t:2]
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# r7 = [t:3]
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# r8 = [t:4]
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# r9 = [t:5]
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# r10 = [t:6]
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# Code
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device_reboot:
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entsp 0x3 # extend sp, save lr (mem[sp]=r15)
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.LDBG12:
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stw r4, sp[0x1] # cross-thread move to stack location
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.LDBG9:
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.file 1 "../../../sc_usb_audio/module_usb_aud_shared/reboot.xc"
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.loc 1 9 0
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.L1_bb_begin:
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freer res[r0]
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.LDBG6:
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.loc 1 16 0
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.L14_Call:
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bl get_core_id
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mov r4, r0 # move r4 <-- r0
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.L4_bb_begin:
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.loc 1 17 0
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.L7_bb_begin:
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.loc 1 17 0
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ldaw r2, sp[0x2]
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ldc r1, 0x6
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.loc 1 17 0
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.L15_Call:
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bl read_sswitch_reg
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.loc 1 18 0
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.L10_bb_begin:
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.loc 1 18 0
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ldc r0, 0x8000
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xor r0, r4, r0
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ldw r2, sp[0x2]
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ldc r1, 0x6
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.loc 1 18 0
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.L16_Call:
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bl write_sswitch_reg_blind
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.loc 1 19 0
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.L12_bb_begin:
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.loc 1 19 0
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mov r0, r4 # move r0 <-- r4
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ldw r2, sp[0x2]
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ldc r1, 0x6
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.loc 1 19 0
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.L17_Call:
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bl write_sswitch_reg_blind
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.LDBG7:
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.loc 1 21 0
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.LDBG13:
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ldw r4, sp[0x1]
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.LDBG14:
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.L13_bb_begin:
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retsp 0x3 # return: dealloc and link (pc=r15=mem[sp])
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.LDBG10:
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.LDBG15:
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.LDBG16:
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.size device_reboot, .-device_reboot
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.cc_bottom device_reboot.function
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.section .debug_frame, "", @progbits
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.cc_top device_reboot.function,device_reboot
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.align 4
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.int .LDBG18-.LDBG17
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.LDBG17:
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.long .LDBG2 # offset in .debug_frame
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.int .LDBG11
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.int .LDBG16-.LDBG11
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.byte 0x01
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.int .LDBG12
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.byte 0x0e
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.uleb128 0xc
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.byte 0x14
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.uleb128 0xe
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.uleb128 0x0
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.byte 0x8f
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.uleb128 0x0
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.byte 0x01
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.int .LDBG13
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.byte 0x0a
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.byte 0x01
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.int .LDBG14
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.byte 0xc4
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.byte 0x01
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.int .LDBG15
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.byte 0x0b
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.align 4, 0
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.LDBG18:
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.cc_bottom device_reboot.function
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# PROFILE
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.linkset .LLNK7, get_core_id.maxchanends $M read_sswitch_reg.maxchanends
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.linkset .LLNK6, .LLNK7 $M write_sswitch_reg_blind.maxchanends
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.linkset .LLNK5, .LLNK6 $M write_sswitch_reg_blind.maxchanends
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.linkset device_reboot.maxchanends, 0#.LLNK5
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.linkset .LLNK10, get_core_id.maxtimers $M read_sswitch_reg.maxtimers
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.linkset .LLNK9, .LLNK10 $M write_sswitch_reg_blind.maxtimers
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.linkset .LLNK8, .LLNK9 $M write_sswitch_reg_blind.maxtimers
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.linkset device_reboot.maxtimers, .LLNK8
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.linkset .LLNK16, get_core_id.maxthreads - 1
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.linkset .LLNK15, 1 + .LLNK16
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.linkset .LLNK14, 1 $M .LLNK15
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.linkset .LLNK18, read_sswitch_reg.maxthreads - 1
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.linkset .LLNK17, 1 + .LLNK18
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.linkset .LLNK13, .LLNK14 $M .LLNK17
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.linkset .LLNK20, write_sswitch_reg_blind.maxthreads - 1
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.linkset .LLNK19, 1 + .LLNK20
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.linkset .LLNK12, .LLNK13 $M .LLNK19
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.linkset .LLNK22, write_sswitch_reg_blind.maxthreads - 1
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.linkset .LLNK21, 1 + .LLNK22
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.linkset .LLNK11, .LLNK12 $M .LLNK21
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.linkset device_reboot.maxthreads, .LLNK11
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###############
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.text
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.LDBG19:
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# Thread names for recovering thread graph in linker
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.LDBG20:
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.extern __builtin_getid, "f{si}(0)"
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.extern __builtin_getid, "f{si}(0)"
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.section .debug_info, "", @progbits
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.LDBG22:
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.int .LDBG24-.LDBG23
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.LDBG23:
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.short 0x0003
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.long .LDBG21 # offset in .debug_abbrev
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.byte 0x04
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.uleb128 0x1
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.long .LDBG0 # low address
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.long .LDBG20 # high address
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.asciiz "../../../sc_usb_audio/module_usb_aud_shared/reboot.xc"
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.asciiz "/local/USBAudio/sw_usb_aud_l1_ios/app_usb_aud_l1/.build"
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.short 0xc000
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.asciiz "XMOS Dwarf Symbolic Debug Generator"
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.long .LDBG1 # offset in .debug_lineprog
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.LDBG25:
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.uleb128 0x2
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.asciiz "long"
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.byte 0x05
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.byte 0x04
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.LDBG26:
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.uleb128 0x2
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.asciiz "unsigned long"
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.byte 0x07
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.byte 0x04
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.LDBG27:
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.uleb128 0x2
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.asciiz "int"
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.byte 0x05
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.byte 0x04
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.LDBG28:
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.uleb128 0x2
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.asciiz "unsigned int"
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.byte 0x07
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.byte 0x04
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.LDBG29:
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.uleb128 0x2
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.asciiz "short"
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.byte 0x05
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.byte 0x02
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.LDBG30:
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.uleb128 0x2
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.asciiz "unsigned short"
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.byte 0x07
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.byte 0x02
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.LDBG31:
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.uleb128 0x2
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.asciiz "char"
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.byte 0x06
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.byte 0x01
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|
.LDBG32:
|
|
.uleb128 0x2
|
|
.asciiz "unsigned char"
|
|
.byte 0x08
|
|
.byte 0x01
|
|
.LDBG33:
|
|
.uleb128 0x2
|
|
.asciiz "chanend"
|
|
.byte 0x07
|
|
.byte 0x04
|
|
.LDBG34:
|
|
.uleb128 0x2
|
|
.asciiz "timer"
|
|
.byte 0x07
|
|
.byte 0x04
|
|
.LDBG35:
|
|
.uleb128 0x2
|
|
.asciiz "clock"
|
|
.byte 0x07
|
|
.byte 0x04
|
|
.LDBG36:
|
|
.uleb128 0x2
|
|
.asciiz "port"
|
|
.byte 0x07
|
|
.byte 0x04
|
|
.LDBG37:
|
|
.uleb128 0x2
|
|
.asciiz "buffered port:1"
|
|
.byte 0x07
|
|
.byte 0x04
|
|
.LDBG38:
|
|
.uleb128 0x2
|
|
.asciiz "buffered port:4"
|
|
.byte 0x07
|
|
.byte 0x04
|
|
.LDBG39:
|
|
.uleb128 0x2
|
|
.asciiz "buffered port:8"
|
|
.byte 0x07
|
|
.byte 0x04
|
|
.LDBG40:
|
|
.uleb128 0x2
|
|
.asciiz "buffered port:16"
|
|
.byte 0x07
|
|
.byte 0x04
|
|
.LDBG41:
|
|
.uleb128 0x2
|
|
.asciiz "buffered port:32"
|
|
.byte 0x07
|
|
.byte 0x04
|
|
.cc_top device_reboot.function,device_reboot
|
|
.LDBG42:
|
|
.uleb128 0x3
|
|
.asciiz "device_reboot"
|
|
.byte 0x01
|
|
.byte 0x09
|
|
.byte 0x01
|
|
.byte 0x01
|
|
.long .LDBG5 # low address
|
|
.long .LDBG19 # high address
|
|
.uleb128 0x4
|
|
.asciiz "spare"
|
|
.byte 0x01
|
|
.short 0x0008
|
|
.int .LDBG33-.LDBG22
|
|
.int .LDBG43
|
|
.section .debug_loc, "", @progbits
|
|
.cc_top device_reboot.function,device_reboot
|
|
.LDBG43:
|
|
.int .LDBG9-.LDBG0
|
|
.int .LDBG10-.LDBG0
|
|
.short .LDBG45-.LDBG44
|
|
.LDBG44:
|
|
.byte 0x50
|
|
.LDBG45:
|
|
.int 0x00000000
|
|
.int 0x00000000
|
|
.cc_bottom device_reboot.function
|
|
.section .debug_info, "", @progbits
|
|
.LDBG46:
|
|
.uleb128 0x5
|
|
.long .LDBG6 # low address
|
|
.long .LDBG7 # high address
|
|
.uleb128 0x6
|
|
.asciiz "pllVal"
|
|
.byte 0x01
|
|
.short 0x000f
|
|
.short .LDBG47-.LDBG46
|
|
.int .LDBG28-.LDBG22
|
|
.int .LDBG48
|
|
.section .debug_loc, "", @progbits
|
|
.cc_top device_reboot.function,device_reboot
|
|
.LDBG48:
|
|
.int .LDBG6-.LDBG0
|
|
.int .LDBG7-.LDBG0
|
|
.short .LDBG50-.LDBG49
|
|
.LDBG49:
|
|
.byte 0x7e
|
|
.sleb128 0x8
|
|
.LDBG50:
|
|
.int 0x00000000
|
|
.int 0x00000000
|
|
.cc_bottom device_reboot.function
|
|
.section .debug_info, "", @progbits
|
|
.LDBG47:
|
|
.uleb128 0x6
|
|
.asciiz "core_id"
|
|
.byte 0x01
|
|
.short 0x0010
|
|
.short 0x0000
|
|
.int .LDBG28-.LDBG22
|
|
.int .LDBG51
|
|
.section .debug_loc, "", @progbits
|
|
.cc_top device_reboot.function,device_reboot
|
|
.LDBG51:
|
|
.int 0x00000000
|
|
.int 0x00000000
|
|
.cc_bottom device_reboot.function
|
|
.section .debug_info, "", @progbits
|
|
.byte 0x00
|
|
.byte 0x00
|
|
.cc_bottom device_reboot.function
|
|
.byte 0x00
|
|
.LDBG24:
|
|
.section .debug_pubnames, "", @progbits
|
|
.int .LDBG53-.LDBG52
|
|
.LDBG52:
|
|
.short 0x0002
|
|
.long .LDBG22 # offset in .debug_info
|
|
.int .LDBG24-.LDBG22
|
|
.cc_top device_reboot.function,device_reboot
|
|
.int .LDBG42-.LDBG22
|
|
.asciiz "device_reboot"
|
|
.cc_bottom device_reboot.function
|
|
.int 0x00000000
|
|
.LDBG53:
|
|
.section .debug_abbrev, "", @progbits
|
|
.LDBG21:
|
|
.uleb128 0x1
|
|
.byte 0x11
|
|
.byte 0x01
|
|
.byte 0x11
|
|
.byte 0x01
|
|
.byte 0x12
|
|
.byte 0x01
|
|
.byte 0x03
|
|
.byte 0x08
|
|
.byte 0x1b
|
|
.byte 0x08
|
|
.byte 0x13
|
|
.byte 0x05
|
|
.byte 0x25
|
|
.byte 0x08
|
|
.byte 0x10
|
|
.byte 0x06
|
|
.byte 0x00
|
|
.byte 0x00
|
|
.uleb128 0x2
|
|
.byte 0x24
|
|
.byte 0x00
|
|
.byte 0x03
|
|
.byte 0x08
|
|
.byte 0x3e
|
|
.byte 0x0b
|
|
.byte 0x0b
|
|
.byte 0x0b
|
|
.byte 0x00
|
|
.byte 0x00
|
|
.uleb128 0x3
|
|
.byte 0x2e
|
|
.byte 0x01
|
|
.byte 0x03
|
|
.byte 0x08
|
|
.byte 0x3a
|
|
.byte 0x0b
|
|
.byte 0x3b
|
|
.byte 0x0b
|
|
.byte 0x3f
|
|
.byte 0x0c
|
|
.byte 0x27
|
|
.byte 0x0c
|
|
.byte 0x11
|
|
.byte 0x01
|
|
.byte 0x12
|
|
.byte 0x01
|
|
.byte 0x00
|
|
.byte 0x00
|
|
.uleb128 0x4
|
|
.byte 0x05
|
|
.byte 0x00
|
|
.byte 0x03
|
|
.byte 0x08
|
|
.byte 0x3a
|
|
.byte 0x0b
|
|
.byte 0x3b
|
|
.byte 0x05
|
|
.byte 0x49
|
|
.byte 0x13
|
|
.byte 0x02
|
|
.byte 0x06
|
|
.byte 0x00
|
|
.byte 0x00
|
|
.uleb128 0x6
|
|
.byte 0x34
|
|
.byte 0x00
|
|
.byte 0x03
|
|
.byte 0x08
|
|
.byte 0x3a
|
|
.byte 0x0b
|
|
.byte 0x3b
|
|
.byte 0x05
|
|
.byte 0x2c
|
|
.byte 0x05
|
|
.byte 0x49
|
|
.byte 0x13
|
|
.byte 0x02
|
|
.byte 0x06
|
|
.byte 0x00
|
|
.byte 0x00
|
|
.uleb128 0x5
|
|
.byte 0x0b
|
|
.byte 0x01
|
|
.byte 0x11
|
|
.byte 0x01
|
|
.byte 0x12
|
|
.byte 0x01
|
|
.byte 0x00
|
|
.byte 0x00
|
|
|
|
.byte 0x00
|
|
.section .xtacalltable, "", @progbits
|
|
.L18_xta_begin:
|
|
.int .L19_xta_end-.L18_xta_begin
|
|
.int 0x00000000
|
|
.asciiz "/local/USBAudio/sw_usb_aud_l1_ios/app_usb_aud_l1/.build"
|
|
.cc_top device_reboot.function, device_reboot
|
|
.asciiz "../../../sc_usb_audio/module_usb_aud_shared/reboot.xc"
|
|
.int 0x00000013
|
|
.long .L17_Call
|
|
.cc_bottom device_reboot.function
|
|
.cc_top device_reboot.function, device_reboot
|
|
.asciiz "../../../sc_usb_audio/module_usb_aud_shared/reboot.xc"
|
|
.int 0x00000012
|
|
.long .L16_Call
|
|
.cc_bottom device_reboot.function
|
|
.cc_top device_reboot.function, device_reboot
|
|
.asciiz "../../../sc_usb_audio/module_usb_aud_shared/reboot.xc"
|
|
.int 0x00000011
|
|
.long .L15_Call
|
|
.cc_bottom device_reboot.function
|
|
.cc_top device_reboot.function, device_reboot
|
|
.asciiz "../../../sc_usb_audio/module_usb_aud_shared/reboot.xc"
|
|
.int 0x00000010
|
|
.long .L14_Call
|
|
.cc_bottom device_reboot.function
|
|
.L19_xta_end:
|
|
.section .xtalabeltable, "", @progbits
|
|
.L20_xta_begin:
|
|
.int .L21_xta_end-.L20_xta_begin
|
|
.int 0x00000000
|
|
.asciiz "/local/USBAudio/sw_usb_aud_l1_ios/app_usb_aud_l1/.build"
|
|
.cc_top device_reboot.function, device_reboot
|
|
.asciiz "../../../sc_usb_audio/module_usb_aud_shared/reboot.xc"
|
|
.int 0x00000015
|
|
.int 0x00000015
|
|
# line info for line 21
|
|
.long .L13_bb_begin
|
|
.asciiz "../../../sc_usb_audio/module_usb_aud_shared/reboot.xc"
|
|
.int 0x00000013
|
|
.int 0x00000013
|
|
# line info for line 19
|
|
.long .L12_bb_begin
|
|
.asciiz "../../../sc_usb_audio/module_usb_aud_shared/reboot.xc"
|
|
.int 0x00000012
|
|
.int 0x00000012
|
|
# line info for line 18
|
|
.long .L10_bb_begin
|
|
.asciiz "../../../sc_usb_audio/module_usb_aud_shared/reboot.xc"
|
|
.int 0x00000011
|
|
.int 0x00000011
|
|
# line info for line 17
|
|
.long .L7_bb_begin
|
|
.asciiz "../../../sc_usb_audio/module_usb_aud_shared/reboot.xc"
|
|
.int 0x00000010
|
|
.int 0x00000010
|
|
# line info for line 16
|
|
.long .L4_bb_begin
|
|
.asciiz "../../../sc_usb_audio/module_usb_aud_shared/reboot.xc"
|
|
.int 0x0000000b
|
|
.int 0x0000000b
|
|
# line info for line 11
|
|
.long .L1_bb_begin
|
|
.cc_bottom device_reboot.function
|
|
.L21_xta_end:
|
|
.section .dp.data, "adw", @progbits
|
|
.align 4
|
|
.align 4
|
|
.section .dp.bss, "adw", @nobits
|
|
.align 4
|
|
.ident "XMOS 32-bit XC Compiler 11.11.0beta1 (build 2136)"
|
|
.core "XS1"
|
|
.corerev "REVB"
|
|
|
|
# memory access instructions: 6
|
|
# total instructions: 18
|
|
########################################
|