From 06e9cf4d378adb2dbe29c15cc1386fb4cafbb6d6 Mon Sep 17 00:00:00 2001 From: Ross Owen Date: Mon, 18 Nov 2013 18:08:13 +0000 Subject: [PATCH] Clockblock for L-series reset-port now declared on tile 0 --- module_usb_audio/main.xc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/module_usb_audio/main.xc b/module_usb_audio/main.xc index 27b5653a..25f4bca7 100755 --- a/module_usb_audio/main.xc +++ b/module_usb_audio/main.xc @@ -137,7 +137,7 @@ on tile[AUDIO_IO_TILE] : clock clk_mst_spd = XS1_CLKBLK_1; on tile[0] : out port p_usb_rst = PORT_USB_RESET; #endif /* L Series also needs a clock for this port */ -clock clk = XS1_CLKBLK_4; +on tile[0] : clock clk = XS1_CLKBLK_4; #else /* Reset port not required for SU1 due to built in Phy */ #define p_usb_rst null