Refactor: Separate XUA lite and app code

This commit is contained in:
Oscar Bailey
2019-02-27 11:05:25 +00:00
parent b12aeac264
commit 0b926fd907
12 changed files with 18 additions and 12 deletions

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<?xml version="1.0" encoding="UTF-8"?>
<Network xmlns="http://www.xmos.com"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.xmos.com http://www.xmos.com">
<Type>Device</Type>
<Name>XVF3510 Device</Name>
<Declarations>
<Declaration>tileref tile[2]</Declaration>
<Declaration>tileref usb_tile</Declaration>
</Declarations>
<Packages>
<Package id="0" Type="XS2-UFnA-512-TQ128">
<Nodes>
<Node Id="0" InPackageId="0" Type="XS2-L16A-512" SystemFrequency="500MHz" OscillatorSrc="1">
<Boot>
<Source Location="bootFlash0"/>
</Boot>
<Tile Number="0" Reference="tile[0]">
<Port Location="XS1_PORT_1B" Name="PORT_SQI_CS_0"/>
<Port Location="XS1_PORT_1C" Name="PORT_SQI_SCLK_0"/>
<Port Location="XS1_PORT_4B" Name="PORT_SQI_SIO_0"/>
</Tile>
<Tile Number="1" Reference="tile[1]"/>
</Node>
<Node Id="1" InPackageId="1" Type="periph:XS1-SU" Reference="usb_tile" Oscillator="24MHz">
</Node>
</Nodes>
<Links>
<Link Encoding="5wire">
<LinkEndpoint NodeId="0" Link="8" Delays="52clk,52clk"/>
<LinkEndpoint NodeId="1" Link="XL0" Delays="1clk,1clk"/>
</Link>
</Links>
</Package>
</Packages>
<Nodes>
<Node Id="3" Type="device:" RoutingId="0x8000">
<Service Id="0" Proto="xscope_host_data(chanend c);">
<Chanend Identifier="c" end="3"/>
</Service>
</Node>
</Nodes>
<Links>
<Link Encoding="2wire" Delays="4,4" Flags="XSCOPE">
<LinkEndpoint NodeId="0" Link="XL0"/>
<LinkEndpoint NodeId="3" Chanend="1"/>
</Link>
</Links>
<ExternalDevices>
<Device NodeId="0" Tile="0" Class="SQIFlash" Name="bootFlash0">
<Attribute Name="PORT_SQI_CS" Value="PORT_SQI_CS_0"/>
<Attribute Name="PORT_SQI_SCLK" Value="PORT_SQI_SCLK_0"/>
<Attribute Name="PORT_SQI_SIO" Value="PORT_SQI_SIO_0"/>
</Device>
</ExternalDevices>
<JTAGChain>
<JTAGDevice NodeId="0"/>
</JTAGChain>
</Network>

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// Copyright (c) 2017-2018, XMOS Ltd, All rights reserved
#ifndef _XUA_CONF_H_
#define _XUA_CONF_H_
#define NUM_USB_CHAN_OUT 2 /* Number of channels from host to device */
#define NUM_USB_CHAN_IN 2 /* Number of channels from device to host */
#define I2S_CHANS_DAC 2 /* Number of I2S channels out of xCORE */
#define I2S_CHANS_ADC 2 /* Number of I2S channels in to xCORE */
#define MCLK_441 (512 * 44100) /* 44.1kHz family master clock frequency */
#define MCLK_48 (512 * 48000) /* 48kHz family master clock frequency */
#define MIN_FREQ 48000 /* Minimum sample rate */
#define MAX_FREQ 48000 /* Maximum sample rate */
#define EXCLUDE_USB_AUDIO_MAIN
#define VENDOR_STR "XMOS"
#define VENDOR_ID 0x20B1
#define PRODUCT_STR_A2 "XUA Lite Class 2"
#define PRODUCT_STR_A1 "XUA Lite Class 1"
#define PID_AUDIO_1 1
#define PID_AUDIO_2 2
#define XUA_DFU_EN 0 /* Disable DFU (for simplicity of example) */
#define INPUT_FORMAT_COUNT 1
#define STREAM_FORMAT_INPUT_1_RESOLUTION_BITS 16
#define OUTPUT_FORMAT_COUNT 1
#define STREAM_FORMAT_OUTPUT_1_RESOLUTION_BITS 16
#define OUTPUT_VOLUME_CONTROL 0
#define INPUT_VOLUME_CONTROL 0
#define UAC_FORCE_FEEDBACK_EP 0
#define XUA_ADAPTIVE 1
#define XUA_LITE 1 // Use simple/optimised USB buffer tasks
#define AUDIO_CLASS 1
#define XUA_NUM_PDM_MICS 4 // It's actually 2 but we run 4ch and ignore 2
#define PDM_MAX_DECIMATION (96000/(MIN_FREQ))
#endif

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// Copyright (c) 2017-2018, XMOS Ltd, All rights reserved
#include "xua_conf.h"
/* TODO */
#define XUD_UAC_NUM_USB_CHAN_OUT NUM_USB_CHAN_OUT
#define XUD_UAC_NUM_USB_CHAN_IN NUM_USB_CHAN_IN