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Added some extra timing margin for port setup/buffer (to avoid I2S data-shift)

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This commit is contained in:
Ross Owen
2017-03-01 12:22:46 +00:00
parent df59ac2e56
commit 30f0689434
1 changed files with 1 additions and 1 deletions
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module_usb_audio/audio_io/audio_io.xc
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@@ -354,7 +354,7 @@ static inline void InitPorts(unsigned divide)
{ {
#pragma xta endpoint "divide_1" #pragma xta endpoint "divide_1"
p_lrclk <: 0 @ tmp; p_lrclk <: 0 @ tmp;
tmp += 100; tmp += 200;
/* Since BCLK is free-running, setup outputs/inputs at a known point in the future */ /* Since BCLK is free-running, setup outputs/inputs at a known point in the future */
#if (I2S_CHANS_DAC != 0) #if (I2S_CHANS_DAC != 0)