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Merge branch '6V3_DEV' of git://git/apps/sc_usb_audio into 6V3_DEV

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This commit is contained in:
Ross Owen
2013-12-12 10:27:37 +00:00
parent 22afdb295c a00d3c329b
commit 3e35609c6a
2 changed files with 9 additions and 13 deletions
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12
module_dfu/src/dfu.xc
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@@ -3,11 +3,11 @@
#include "devicedefines.h" #include "devicedefines.h"
#include "xud.h" #include "xud.h"
#ifdef ARCH_G //#ifdef ARCH_G
#include "XUD_USB_Defines.h" //#include "XUD_USB_Defines.h"
#else //#else
#include "usb.h" #include "usb.h"
#endif //#endif
#include "dfu_types.h" #include "dfu_types.h"
#include "flash_interface.h" #include "flash_interface.h"
@@ -400,11 +400,7 @@ int DFUDeviceRequests(XUD_ep ep0_out, XUD_ep &?ep0_in, USB_SetupPacket_t &sp, ch
{ {
// Host to device // Host to device
if (sp.wLength) if (sp.wLength)
#ifdef ARCH_G
data_buffer_len = XUD_GetBuffer_(ep0_out, 0, (data_buffer, unsigned char[]));
#else
data_buffer_len = XUD_GetBuffer(ep0_out, (data_buffer, unsigned char[])); data_buffer_len = XUD_GetBuffer(ep0_out, (data_buffer, unsigned char[]));
#endif
} }
// Map Standard DFU commands onto device level firmware upgrade mechanism // Map Standard DFU commands onto device level firmware upgrade mechanism

10
module_usb_audio/main.xc
View File

@@ -109,7 +109,7 @@ on tile[AUDIO_IO_TILE] : in port p_bclk = PORT_I2S_BCLK;
#endif #endif
on tile[AUDIO_IO_TILE] : port p_mclk_in = PORT_MCLK_IN; on tile[AUDIO_IO_TILE] : port p_mclk_in = PORT_MCLK_IN;
on tile[0] : in port p_for_mclk_count = PORT_MCLK_COUNT; on tile[XUD_TILE] : in port p_for_mclk_count = PORT_MCLK_COUNT;
#ifdef SPDIF #ifdef SPDIF
on tile[AUDIO_IO_TILE] : buffered out port:32 p_spdif_tx = PORT_SPDIF_OUT; on tile[AUDIO_IO_TILE] : buffered out port:32 p_spdif_tx = PORT_SPDIF_OUT;
@@ -126,9 +126,9 @@ on tile[AUDIO_IO_TILE] : clock clk_midi = XS1_CLKBLK_REF;
#endif #endif
on tile[AUDIO_IO_TILE] : clock clk_audio_mclk = XS1_CLKBLK_2; /* Master clock */ on tile[AUDIO_IO_TILE] : clock clk_audio_mclk = XS1_CLKBLK_2; /* Master clock */
#if(AUDIO_IO_TILE != 0) #if(AUDIO_IO_TILE != XUD_TILE)
on tile[0] : clock clk_audio_mclk2 = XS1_CLKBLK_2; /* Master clock */ on tile[XUD_TILE] : clock clk_audio_mclk2 = XS1_CLKBLK_2; /* Master clock */
on tile[0] : in port p_mclk_in2 = PORT_MCLK_IN2; on tile[XUD_TILE] : in port p_mclk_in2 = PORT_MCLK_IN2;
#endif #endif
@@ -138,7 +138,7 @@ on tile[AUDIO_IO_TILE] : clock clk_mst_spd = XS1_CLKBLK_1;
#endif #endif
/* L Series needs a port to use for USB reset */ /* L Series needs a port to use for USB reset */
#ifdef ARCH_L #if defined(ARCH_L) || defined(ARCH_G)
#ifdef PORT_USB_RESET #ifdef PORT_USB_RESET
/* This define is checked since it could be on a shift reg or similar */ /* This define is checked since it could be on a shift reg or similar */
on tile[XUD_TILE] : out port p_usb_rst = PORT_USB_RESET; on tile[XUD_TILE] : out port p_usb_rst = PORT_USB_RESET;