Updates to get l2 building

This commit is contained in:
Ross Owen
2013-03-15 14:57:04 +00:00
parent c918d1c692
commit 42b2cecf5c
3 changed files with 4 additions and 7 deletions

View File

@@ -1,13 +1,9 @@
/** /**
* @file AudioRequests.xc
* @brief Implements relevant requests from the USB Audio 2.0 Specification * @brief Implements relevant requests from the USB Audio 2.0 Specification
* @author Ross Owen, XMOS Semiconductor * @author Ross Owen, XMOS Semiconductor
* @version 1.4
*/ */
#include <xs1.h> #include <xs1.h>
//#include <print.h>
#include "xud.h" #include "xud.h"
#include "usb.h" #include "usb.h"
#include "usbaudio20.h" #include "usbaudio20.h"

View File

@@ -1317,7 +1317,7 @@ unsigned char cfgDesc_Audio2[] =
#ifdef SPDIF_RX #ifdef SPDIF_RX
#define SPDIF_RX_NUM_STRS 1 #define SPDIF_RX_NUM_STRS 1
#else #else
#define SPDIF_TX_NUM_STRS 0 #define SPDIF_RX_NUM_STRS 0
#endif #endif
#ifdef ADAT_RX #ifdef ADAT_RX

View File

@@ -124,10 +124,11 @@ on stdcore[AUDIO_IO_CORE] : clock clk_mst_spd = XS1_CLKBLK_1;
/* L Series needs a port to use for USB reset */ /* L Series needs a port to use for USB reset */
#ifdef ARCH_L #ifdef ARCH_L
#ifdef PORT_USB_RESET #ifdef PORT_USB_RESET
on stdcore[0] : out port p_usb_rst = PORT_USB_RESET; /* This define is checked since it could be on a shift reg or similar */
on stdcore[0] : out port p_usb_rst = PORT_USB_RESET;
#endif #endif
/* L Series also needs a clock for this port */ /* L Series also needs a clock for this port */
clock clk = XS1_CLKBLK_4; clock clk = XS1_CLKBLK_4;
#else #else
/* Reset port not required for SU1 due to built in Phy */ /* Reset port not required for SU1 due to built in Phy */
#define p_usb_rst null #define p_usb_rst null