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Tidy up first pulse of clock during startup in TDM mode

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xross
2022-09-27 17:59:13 +01:00
parent 351a38fa4b
commit 6beb1f34ae
1 changed files with 4 additions and 3 deletions
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5
lib_xua/src/core/audiohub/audiohub_initport.xc
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@@ -52,6 +52,9 @@ void InitPorts_master(unsigned divide, buffered _XUA_CLK_DIR port:32 p_lrclk, bu
} }
#endif #endif
if(XUA_PCM_FORMAT == XUA_PCM_FORMAT_TDM)
p_lrclk @ tmp <: 0x80000000;
else
p_lrclk @ tmp <: 0x7FFFFFFF; p_lrclk @ tmp <: 0x7FFFFFFF;
#if (I2S_CHANS_ADC != 0) #if (I2S_CHANS_ADC != 0)
@@ -72,9 +75,7 @@ void InitPorts_master(unsigned divide, buffered _XUA_CLK_DIR port:32 p_lrclk, bu
} }
#endif #endif
} }
#else #else
void InitPorts_slave(unsigned divide, buffered _XUA_CLK_DIR port:32 p_lrclk, buffered _XUA_CLK_DIR port:32 p_bclk, buffered out port:32 (&?p_i2s_dac)[I2S_WIRES_DAC], buffered in port:32 (&?p_i2s_adc)[I2S_WIRES_ADC]) void InitPorts_slave(unsigned divide, buffered _XUA_CLK_DIR port:32 p_lrclk, buffered _XUA_CLK_DIR port:32 p_bclk, buffered out port:32 (&?p_i2s_dac)[I2S_WIRES_DAC], buffered in port:32 (&?p_i2s_adc)[I2S_WIRES_ADC])
{ {
#if (I2S_CHANS_ADC != 0 || I2S_CHANS_DAC != 0) #if (I2S_CHANS_ADC != 0 || I2S_CHANS_DAC != 0)