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Merge branch 'develop' into develop

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This commit is contained in:
Ross Owen
2023-05-17 14:00:38 +01:00
committed by GitHub
parent c469dd6cde 6d168b3209
commit 9b104af8cf
6 changed files with 28 additions and 33 deletions
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4
lib_xua/doc/rst/feat_spdif_rx.rst
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@@ -20,11 +20,11 @@ Finally, a channel for the output samples must be declared, note, this should be
The S/PDIF receiver should be called on the appropriate tile:: The S/PDIF receiver should be called on the appropriate tile::
SpdifReceive(p_spdif_rx, c_spdif_rx, 1, clk_spd_rx); spdif_rx(c_spdif_rx,p_spdif_rx,clk_spd_rx,192000);
.. note:: .. note::
It is recomended to use the value 1 for the ``initial_divider`` parameter It is recomended to use the value 192000 for the ``sample_freq_estimate`` parameter
With the steps above an S/PDIF stream can be captured by the xCORE. To be functionally useful the audio With the steps above an S/PDIF stream can be captured by the xCORE. To be functionally useful the audio
master clock must be able to synchronise to this external digital stream. Additionally, the host can be master clock must be able to synchronise to this external digital stream. Additionally, the host can be

14
lib_xua/src/core/audiohub/xua_audiohub.xc
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@@ -701,17 +701,16 @@ void XUA_AudioHub(chanend ?c_aud, clock ?clk_audio_mclk, clock ?clk_audio_bclk,
numBits = 32; numBits = 32;
} }
#endif #endif
divide = mClk / ( curSamFreq * numBits); divide = mClk / (curSamFreq * numBits);
/* TODO; we should catch and handle the case when divide is 0. Currently design will lock up */ /* TODO; we should catch and handle the case when divide is 0. Currently design will lock up */
} }
#if (DSD_CHANS_DAC > 0) #if (DSD_CHANS_DAC > 0)
if(dsdMode) if(dsdMode)
{ {
/* Configure audio ports */ /* Configure audio ports */
ConfigAudioPortsWrapper( ConfigAudioPortsWrapper(
#if (I2S_CHANS_DAC != 0) || (DSD_CHANS_DAC != 0) #if (I2S_CHANS_DAC != 0) || (DSD_CHANS_DAC != 0)
p_dsd_dac, p_dsd_dac,
DSD_CHANS_DAC, DSD_CHANS_DAC,
@@ -724,7 +723,7 @@ void XUA_AudioHub(chanend ?c_aud, clock ?clk_audio_mclk, clock ?clk_audio_bclk,
null, null,
p_dsd_clk, p_dsd_clk,
#endif #endif
p_mclk_in, clk_audio_bclk, divide, curSamFreq, dsdMode); p_mclk_in, clk_audio_bclk, divide, curSamFreq);
} }
else else
#endif #endif
@@ -747,9 +746,8 @@ void XUA_AudioHub(chanend ?c_aud, clock ?clk_audio_mclk, clock ?clk_audio_bclk,
p_bclk, p_bclk,
#endif #endif
#endif #endif
p_mclk_in, clk_audio_bclk, divide, curSamFreq, dsdMode); p_mclk_in, clk_audio_bclk, divide, curSamFreq);
} }
{ {
unsigned curFreq = curSamFreq; unsigned curFreq = curSamFreq;

8
lib_xua/src/core/main.xc
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@@ -31,7 +31,7 @@
#endif #endif
#if (XUA_SPDIF_RX_EN) #if (XUA_SPDIF_RX_EN)
#include "SpdifReceive.h" #include "spdif.h"
#endif #endif
#if (XUA_ADAT_RX_EN) #if (XUA_ADAT_RX_EN)
@@ -142,7 +142,7 @@ on stdcore[XUD_TILE] : buffered in port:32 p_adat_rx = PORT_ADAT_IN;
#endif #endif
#if (XUA_SPDIF_RX_EN) #if (XUA_SPDIF_RX_EN)
on tile[XUD_TILE] : buffered in port:4 p_spdif_rx = PORT_SPDIF_IN; on tile[XUD_TILE] : in port p_spdif_rx = PORT_SPDIF_IN;
#endif #endif
#if (XUA_SPDIF_RX_EN) || (XUA_ADAT_RX_EN) || (XUA_SYNCMODE == XUA_SYNCMODE_SYNC) #if (XUA_SPDIF_RX_EN) || (XUA_ADAT_RX_EN) || (XUA_SYNCMODE == XUA_SYNCMODE_SYNC)
@@ -228,7 +228,7 @@ XUD_EpType epTypeTableIn[ENDPOINT_COUNT_IN] = { XUD_EPTYPE_CTL | XUD_STATUS_ENAB
XUD_EPTYPE_ISO, /* Async feedback endpoint */ XUD_EPTYPE_ISO, /* Async feedback endpoint */
#endif #endif
#if (XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) #if (XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN)
XUD_EPTYPE_BUL, XUD_EPTYPE_INT,
#endif #endif
#ifdef MIDI #ifdef MIDI
XUD_EPTYPE_BUL, XUD_EPTYPE_BUL,
@@ -685,7 +685,7 @@ int main()
on tile[XUD_TILE]: on tile[XUD_TILE]:
{ {
thread_speed(); thread_speed();
SpdifReceive(p_spdif_rx, c_spdif_rx, 1, clk_spd_rx); spdif_rx(c_spdif_rx,p_spdif_rx,clk_spd_rx,192000);
} }
#endif #endif

12
lib_xua/src/core/ports/audioports.c
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@@ -1,4 +1,4 @@
// Copyright 2013-2022 XMOS LIMITED. // Copyright 2013-2023 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1. // This Software is subject to the terms of the XMOS Public Licence: Version 1.
#include <xs1.h> #include <xs1.h>
@@ -9,17 +9,17 @@
#include "xua.h" #include "xua.h"
/* Note since DSD ports could be reused for I2S ports we do all the setup manually in C */ /* Note since DSD ports could be reused for I2S ports we do all the setup manually in C */
#if DSD_CHANS_DAC > 0 #if (DSD_CHANS_DAC > 0)
port p_dsd_dac[DSD_CHANS_DAC] = { port p_dsd_dac[DSD_CHANS_DAC] = {
PORT_DSD_DAC0, PORT_DSD_DAC0,
#endif #endif
#if DSD_CHANS_DAC > 1 #if (DSD_CHANS_DAC > 1)
PORT_DSD_DAC1, PORT_DSD_DAC1,
#endif #endif
#if DSD_CHANS_DAC > 2 #if (DSD_CHANS_DAC > 2)
#error > 2 DSD chans currently not supported #error > 2 DSD chans currently not supported
#endif #endif
#if DSD_CHANS_DAC > 0 #if (DSD_CHANS_DAC > 0)
}; };
port p_dsd_clk = PORT_DSD_CLK; port p_dsd_clk = PORT_DSD_CLK;
#endif #endif
@@ -45,7 +45,7 @@ void ConfigAudioPortsWrapper(
port p_lrclk, port p_lrclk,
port p_bclk, port p_bclk,
#endif #endif
port p_mclk_in, clock clk_audio_bclk, unsigned int divide, unsigned curSamFreq, unsigned int dsdMode) port p_mclk_in, clock clk_audio_bclk, unsigned int divide, unsigned curSamFreq)
{ {
ConfigAudioPorts( ConfigAudioPorts(
#if (I2S_CHANS_DAC != 0) || (DSD_CHANS_DAC != 0) #if (I2S_CHANS_DAC != 0) || (DSD_CHANS_DAC != 0)

6
lib_xua/src/core/ports/audioports.h
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@@ -1,4 +1,4 @@
// Copyright 2011-2022 XMOS LIMITED. // Copyright 2011-2023 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1. // This Software is subject to the terms of the XMOS Public Licence: Version 1.
#ifndef _AUDIOPORTS_H_ #ifndef _AUDIOPORTS_H_
#define _AUDIOPORTS_H_ #define _AUDIOPORTS_H_
@@ -79,7 +79,7 @@ void ConfigAudioPortsWrapper(
buffered in port:32 p_bclk, buffered in port:32 p_bclk,
#endif #endif
#endif #endif
in port p_mclk_in, clock clk_audio_bclk, unsigned int divide, unsigned curSamFreq, unsigned int dsdMode); in port p_mclk_in, clock clk_audio_bclk, unsigned int divide, unsigned curSamFreq);
#else #else
void ConfigAudioPortsWrapper( void ConfigAudioPortsWrapper(
@@ -95,7 +95,7 @@ void ConfigAudioPortsWrapper(
port p_lrclk, port p_lrclk,
port p_bclk, port p_bclk,
#endif #endif
port p_mclk_in, clock clk_audio_bclk, unsigned int divide, unsigned curSamFreq, unsigned int dsdMode); port p_mclk_in, clock clk_audio_bclk, unsigned int divide, unsigned curSamFreq);
#endif /* __XC__*/ #endif /* __XC__*/

17
lib_xua/src/core/ports/audioports.xc
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@@ -1,4 +1,4 @@
// Copyright 2011-2022 XMOS LIMITED. // Copyright 2011-2023 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1. // This Software is subject to the terms of the XMOS Public Licence: Version 1.
#include <xs1.h> #include <xs1.h>
#include <platform.h> #include <platform.h>
@@ -6,9 +6,7 @@
#include "xua.h" #include "xua.h"
#include "audioports.h" #include "audioports.h"
//extern in port p_mclk_in;
extern clock clk_audio_mclk; extern clock clk_audio_mclk;
//extern clock clk_audio_bclk;
void ConfigAudioPorts( void ConfigAudioPorts(
#if (I2S_CHANS_DAC != 0) || (DSD_CHANS_DAC != 0) #if (I2S_CHANS_DAC != 0) || (DSD_CHANS_DAC != 0)
@@ -58,7 +56,7 @@ void ConfigAudioPorts(
} }
#endif #endif
#if (I2S_CHANS_DAC != 0) #if (I2S_CHANS_DAC != 0)|| (DSD_CHANS_DAC != 0)
for(int i = 0; i < numPortsDac; i++) for(int i = 0; i < numPortsDac; i++)
{ {
clearbuf(p_i2s_dac[i]); clearbuf(p_i2s_dac[i]);
@@ -82,7 +80,7 @@ void ConfigAudioPorts(
/* Some adustments for timing. Sample ADC lines on negative edge and add some delay */ /* Some adustments for timing. Sample ADC lines on negative edge and add some delay */
if(XUA_PCM_FORMAT == XUA_PCM_FORMAT_TDM) if(XUA_PCM_FORMAT == XUA_PCM_FORMAT_TDM)
{ {
for(int i = 0; i < I2S_WIRES_ADC; i++) for(int i = 0; i < numPortsAdc; i++)
{ {
set_port_sample_delay(p_i2s_adc[i]); set_port_sample_delay(p_i2s_adc[i]);
set_pad_delay(p_i2s_adc[i], 4); set_pad_delay(p_i2s_adc[i], 4);
@@ -91,7 +89,6 @@ void ConfigAudioPorts(
#endif #endif
#elif (CODEC_MASTER) #elif (CODEC_MASTER)
/* Stop bit and master clock blocks */ /* Stop bit and master clock blocks */
stop_clock(clk_audio_bclk); stop_clock(clk_audio_bclk);
@@ -112,9 +109,9 @@ void ConfigAudioPorts(
set_clock_fall_delay(clk_audio_bclk, bClkDelay_fall); set_clock_fall_delay(clk_audio_bclk, bClkDelay_fall);
#endif #endif
#if (I2S_CHANS_DAC != 0) #if (I2S_CHANS_DAC != 0) || (DSD_CHANS_DAC != 0)
/* Clock I2S output data ports from b-clock clock block */ /* Clock I2S/DSD output data ports from b-clock clock block */
for(int i = 0; i < I2S_WIRES_DAC; i++) for(int i = 0; i < numPortsDac; i++)
{ {
configure_out_port_no_ready(p_i2s_dac[i], clk_audio_bclk, 0); configure_out_port_no_ready(p_i2s_dac[i], clk_audio_bclk, 0);
} }
@@ -122,7 +119,7 @@ void ConfigAudioPorts(
#if (I2S_CHANS_ADC != 0) #if (I2S_CHANS_ADC != 0)
/* Clock I2S input data ports from clock block */ /* Clock I2S input data ports from clock block */
for(int i = 0; i < I2S_WIRES_ADC; i++) for(int i = 0; i < numPortsAdc; i++)
{ {
configure_in_port_no_ready(p_i2s_adc[i], clk_audio_bclk); configure_in_port_no_ready(p_i2s_adc[i], clk_audio_bclk);
} }