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Ross Owen
2015-05-07 17:19:35 +01:00
parent 5da9575b65
commit b94f14fc05
1 changed files with 2 additions and 1 deletions
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3
module_usb_audio/main.xc
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@@ -160,7 +160,8 @@ on tile[XUD_TILE] : clock clk_spd_rx = CLKBLK_SPDIF_RX;
#endif
#if(XUD_SERIES_SUPPORT != XUD_U_SERIES) && defined(ADAT_RX)
/* Cannot used CLKBLK_REF for L/G-series as this is USB clock */
/* Cannot use default clock (CLKBLK_REF) for ADAT RX since it is tied to the
60MHz USB clock on G/L series parts. */
on tile[XUD_TILE] : clock clk_adat_rx = CLKBLK_ADAT_RX;
#endif