From d9de1f0322ae374c5bd045c3043ff82828706928 Mon Sep 17 00:00:00 2001 From: Ed Clarke Date: Wed, 1 May 2019 10:58:15 +0100 Subject: [PATCH] Add clock divider checks and remove debug prints --- lib_xua/src/core/audiohub/xua_audiohub.xc | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/lib_xua/src/core/audiohub/xua_audiohub.xc b/lib_xua/src/core/audiohub/xua_audiohub.xc index 5ae90465..fdab7edc 100755 --- a/lib_xua/src/core/audiohub/xua_audiohub.xc +++ b/lib_xua/src/core/audiohub/xua_audiohub.xc @@ -14,7 +14,8 @@ #include #include #include -#include +#include + #include "xua.h" @@ -185,7 +186,6 @@ static inline int HandleSampleClock(int frameCount, buffered _XUA_CLK_DIR port:3 if ((lrval & lrval_mask) != 0x80000000) { syncError = 1; - printhexln(lrval); } } else @@ -193,7 +193,6 @@ static inline int HandleSampleClock(int frameCount, buffered _XUA_CLK_DIR port:3 if ((lrval | (~lrval_mask)) != 0x7FFFFFFF) { syncError = 1; - printhexln(lrval); } } } @@ -794,7 +793,15 @@ void XUA_AudioHub(chanend ?c_aud, clock ?clk_audio_mclk, clock ?clk_audio_bclk, #endif divide = mClk / ( curSamFreq * numBits); - /* TODO; we should catch and handle the case when divide is 0. Currently design will lock up */ + //Do some checks + xassert((divide > 0) && "Error: divider is 0, BCLK rate unachievable"); + + unsigned remainder = mClk % ( curSamFreq * numBits); + xassert((!remainder) && "Error: MCLK not divisible into BCLK by an integer number"); + + unsigned divider_is_odd = divide & 0x1; + xassert((!divider_is_odd) && "Error: divider is odd, clockblock cannot produce desired BCLK"); + }