Added start of AN00248

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xross
2018-04-04 14:15:42 +01:00
parent 7b7d7f7e98
commit e5ed3e88d6
11 changed files with 751 additions and 0 deletions

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// Copyright (c) 2017-2018, XMOS Ltd, All rights reserved
/* A very simple *example* of a USB audio application (and as such is un-verified for production)
*
* It uses the main blocks from the lib_xua with the addition of PDM mic support using lib_mic_array
*
* - No DFU
*
*/
#include <xs1.h>
#include <platform.h>
#include "xua.h"
#include "xud_device.h"
/* From lib_mic_array */
#include "mic_array.h"
/* Lib_mic_array declarations. Note, the defines come from the xn file */
in port p_pdm_clk = PORT_PDM_CLK; /* Port for PDM mic clock */
in port p_pdm_mclk = PORT_PDM_MCLK; /* Master clock for PDM mics */
in buffered port:32 p_pdm_mics = PORT_PDM_DATA; /* Port for PDM mic data */
clock clk_pdm = on tile[0]: XS1_CLKBLK_1; /* Clock-block for PDM mics */
/* Lib_xua port declarations. Note, the defines come from the xn file */
in port p_mclk_in = PORT_MCLK_IN; /* Master clock for the audio IO tile */
/* Resources for USB feedback */
in port p_for_mclk_count = PORT_MCLK_COUNT; /* Extra port for counting master clock ticks */
/* Clock-block declarations */
clock clk_audio_mclk = on tile[1]: XS1_CLKBLK_1;/* Master clock */
/* Endpoint type tables - informs XUD what the transfer types for each Endpoint in use and also
* if the endpoint wishes to be informed of USB bus resets */
XUD_EpType epTypeTableOut[] = {XUD_EPTYPE_CTL | XUD_STATUS_ENABLE, XUD_EPTYPE_ISO};
XUD_EpType epTypeTableIn[] = {XUD_EPTYPE_CTL | XUD_STATUS_ENABLE, XUD_EPTYPE_ISO};
int main()
{
/* Channels for lib_xud */
chan c_ep_out[2];
chan c_ep_in[2];
/* Channel for communicating SOF notifications from XUD to the Buffering cores */
chan c_sof;
/* Channel for audio data between buffering cores and AudioHub/IO core */
chan c_aud;
/* Channel for communicating control messages from EP0 to the rest of the device (via the buffering cores) */
chan c_aud_ctl;
/* Array of channels for communication between PDM mic decimator task(s) and the XUA mic buffer task */
streaming chan c_ds_output[2];
/* Channel for communcation between XUA_AudioHub() and the XUA mic buffer task */
chan c_mic_pcm;
par
{
/* Low level USB device layer core */
on tile[1]: XUD_Main(c_ep_out, 2, c_ep_in, 2, c_sof, epTypeTableOut, epTypeTableIn, null, null, -1, XUD_SPEED_HS, XUD_PWR_BUS);
/* Endpoint 0 core from lib_xua */
/* Note, since we are not using many features we pass in null for quite a few params.. */
on tile[1]: XUA_Endpoint0(c_ep_out[0], c_ep_in[0], c_aud_ctl, null, null, null, null);
on tile[1]:
{
/* Connect master-clock clock-block to clock-block pin */
set_clock_src(clk_audio_mclk, p_mclk_in); /* Clock clock-block from mclk pin */
set_port_clock(p_for_mclk_count, clk_audio_mclk); /* Clock the "count" port from the clock block */
/* Note, AudioHub() will start the clock */
par
{
/* Buffering task - handles audio data to/from EP's and gives/gets data to/from the audio I/O core */
/* Note, this spawns two cores */
XUA_Buffer(c_ep_out[1], c_ep_in[1], c_sof, c_aud_ctl, p_for_mclk_count, c_aud);
/* AudioHub/IO core does most of the audio IO i.e. I2S (also serves as a hub for all audio) */
/* Note, since we are not using I2S we pass in null for LR and Bit clock ports and the I2S dataline ports */
XUA_AudioHub(c_aud, clk_audio_mclk, null, p_mclk_in, null, null, null, null, c_mic_pcm);
}
}
on tile[0]:
{
streaming chan c_4x_pdm_mic_0;
streaming chan c_4x_pdm_mic_1;
configure_clock_src_divide(clk_pdm, p_pdm_mclk, 4); /* Master clock to PDM clock divide */
configure_port_clock_output(p_pdm_clk, clk_pdm);
configure_in_port(p_pdm_mics, clk_pdm);
start_clock(clk_pdm);
par
{
/* PDM receive I/O task */
mic_array_pdm_rx(p_pdm_mics, c_4x_pdm_mic_0, c_4x_pdm_mic_1);
/* Run two decimator tasks for 8 mics */
mic_array_decimate_to_pcm_4ch(c_4x_pdm_mic_0, c_ds_output[0], MIC_ARRAY_NO_INTERNAL_CHANS);
mic_array_decimate_to_pcm_4ch(c_4x_pdm_mic_1, c_ds_output[1], MIC_ARRAY_NO_INTERNAL_CHANS);
XUA_PdmBuffer(c_ds_output, c_mic_pcm);
}
}
}
return 0;
}

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#include <xs1.h>
#include <assert.h>
#include <platform.h>
#include "xua.h"
/* 0: DAC reset */
/* 1: Ethernet Phy reset */
on tile[1] : out port p_gpio = XS1_PORT_4F;
void AudioHwInit()
{
/* DAC in reset */
p_gpio <: 0;
return;
}
/* Configures the external audio hardware for the required sample frequency */
void AudioHwConfig(unsigned samFreq, unsigned mClk, unsigned dsdMode,
unsigned sampRes_DAC, unsigned sampRes_ADC)
{
/* Note, without any config the Cirrus 2100 will output it's 24.576MHz ref clock
to the Aux output - which we will use for mclk */
return;
}
//:

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<?xml version="1.0" encoding="UTF-8"?>
<Network xmlns="http://www.xmos.com" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.xmos.com http://www.xmos.com" ManuallySpecifiedRouting="true">
<Type>Board</Type>
<Name>XS2 MC Audio</Name>
<Declarations>
<Declaration>tileref tile[2]</Declaration>
<Declaration>tileref usb_tile</Declaration>
</Declarations>
<Packages>
<Package id="0" Type="XS2-UnA-512-FB236">
<Nodes>
<Node Id="0" InPackageId="0" Type="XS2-L16A-512" Oscillator="24MHz" SystemFrequency="500MHz" referencefrequency="100MHz">
<Boot>
<Source Location="SPI:bootFlash"/>
</Boot>
<Tile Number="0" Reference="tile[0]">
<Port Location="XS1_PORT_1B" Name="PORT_SQI_CS"/>
<Port Location="XS1_PORT_1C" Name="PORT_SQI_SCLK"/>
<Port Location="XS1_PORT_4B" Name="PORT_SQI_SIO"/>
<!-- Mic related ports -->
<Port Location="XS1_PORT_1E" Name="PORT_PDM_CLK"/>
<Port Location="XS1_PORT_8B" Name="PORT_PDM_DATA"/>
<Port Location="XS1_PORT_1F" Name="PORT_PDM_MCLK"/>
<!-- LED ports -->
<Port Location="XS1_PORT_8C" Name="PORT_LED0_TO_7"/>
<Port Location="XS1_PORT_1K" Name="PORT_LED8"/>
<Port Location="XS1_PORT_1L" Name="PORT_LED9"/>
<Port Location="XS1_PORT_8D" Name="PORT_LED10_TO_12"/>
<Port Location="XS1_PORT_1P" Name="PORT_LED_OEN"/>
<!-- Button ports -->
<Port Location="XS1_PORT_4A" Name="PORT_BUT_A_TO_D"/>
</Tile>
<Tile Number="1" Reference="tile[1]">
<Port Location="XS1_PORT_1H" Name="PORT_USB_TX_READYIN"/>
<Port Location="XS1_PORT_1J" Name="PORT_USB_CLK"/>
<Port Location="XS1_PORT_1K" Name="PORT_USB_TX_READYOUT"/>
<Port Location="XS1_PORT_1I" Name="PORT_USB_RX_READY"/>
<Port Location="XS1_PORT_1E" Name="PORT_USB_FLAG0"/>
<Port Location="XS1_PORT_1F" Name="PORT_USB_FLAG1"/>
<Port Location="XS1_PORT_1G" Name="PORT_USB_FLAG2"/>
<Port Location="XS1_PORT_8A" Name="PORT_USB_TXD"/>
<Port Location="XS1_PORT_8B" Name="PORT_USB_RXD"/>
<!-- Audio Ports -->
<Port Location="XS1_PORT_4D" Name="PORT_PLL_REF"/>
<Port Location="XS1_PORT_1O" Name="PORT_MCLK_IN"/>
<Port Location="XS1_PORT_1N" Name="PORT_I2S_LRCLK"/>
<Port Location="XS1_PORT_1M" Name="PORT_I2S_BCLK"/>
<Port Location="XS1_PORT_1P" Name="PORT_I2S_DAC0"/>
<Port Location="XS1_PORT_4E" Name="PORT_I2C"/>
<Port Location="XS1_PORT_16B" Name="PORT_MCLK_COUNT"/>
</Tile>
</Node>
<Node Id="1" InPackageId="1" Type="periph:XS1-SU" Reference="usb_tile" Oscillator="24MHz">
</Node>
</Nodes>
<Links>
<Link Encoding="5wire">
<LinkEndpoint NodeId="0" Link="8" Delays="52clk,52clk"/>
<LinkEndpoint NodeId="1" Link="XL0" Delays="1clk,1clk"/>
</Link>
</Links>
</Package>
</Packages>
<Nodes>
<Node Id="2" Type="device:" RoutingId="0x8000">
<Service Id="0" Proto="xscope_host_data(chanend c);">
<Chanend Identifier="c" end="3"/>
</Service>
</Node>
</Nodes>
<Links>
<Link Encoding="2wire" Delays="4,4" Flags="XSCOPE">
<LinkEndpoint NodeId="0" Link="XL0"/>
<LinkEndpoint NodeId="2" Chanend="1"/>
</Link>
</Links>
<ExternalDevices>
<Device NodeId="0" Tile="0" Class="SQIFlash" Name="bootFlash" Type="S25FL116K">
<Attribute Name="PORT_SQI_CS" Value="PORT_SQI_CS"/>
<Attribute Name="PORT_SQI_SCLK" Value="PORT_SQI_SCLK"/>
<Attribute Name="PORT_SQI_SIO" Value="PORT_SQI_SIO"/>
</Device>
</ExternalDevices>
<JTAGChain>
<JTAGDevice NodeId="0"/>
<JTAGDevice NodeId="1"/>
</JTAGChain>
</Network>

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// Copyright (c) 2017-2018, XMOS Ltd, All rights reserved
#ifndef _XUA_CONF_H_
#define _XUA_CONF_H_
#define NUM_USB_CHAN_OUT 0
#define NUM_USB_CHAN_IN 8
#define I2S_CHANS_DAC 0
#define I2S_CHANS_ADC 0
#define MCLK_441 (512 * 44100)
#define MCLK_48 (512 * 48000)
#define MIN_FREQ 48000
#define MAX_FREQ 48000
#define EXCLUDE_USB_AUDIO_MAIN
#define NUM_PDM_MICS 8
#define VENDOR_STR "XMOS"
#define VENDOR_ID 0x20B1
#define PRODUCT_STR_A2 "XUA PDM Example"
#define PRODUCT_STR_A1 "XUA PDM Example"
#define PID_AUDIO_1 1
#define PID_AUDIO_2 2
#define AUDIO_CLASS 2
#define AUDIO_CLASS_FALLBACK 0
#define BCD_DEVICE 0x1234
#define XUA_DFU_EN 0
#endif

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// Copyright (c) 2017-2018, XMOS Ltd, All rights reserved
#include "xua_conf.h"
/* TODO */
#define XUD_UAC_NUM_USB_CHAN_OUT NUM_USB_CHAN_OUT
#define XUD_UAC_NUM_USB_CHAN_IN NUM_USB_CHAN_IN