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Fixed trap when SPDIF_TX and ADAT_TX both enabled - caused by sharing clock block

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This commit is contained in:
Ross Owen
2015-03-04 15:56:01 +00:00
parent ab392eb373
commit ea931680ad
1 changed files with 10 additions and 7 deletions
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17
module_usb_audio/audio.xc
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@@ -963,17 +963,20 @@ chanend ?c_config, chanend ?c)
EnableBufferedPort(p_dsd_dac[i], 32);
}
#endif
#ifdef ADAT_TX
/* Share SPDIF clk blk */
configure_clock_src(clk_mst_spd, p_mclk_in);
configure_out_port_no_ready(p_adat_tx, clk_mst_spd, 0);
set_clock_fall_delay(clk_mst_spd, 7);
#ifndef SPDIF
start_clock(clk_mst_spd);
#endif
#endif
/* Configure ADAT/SPDIF tx ports */
#ifdef SPDIF
SpdifTransmitPortConfig(p_spdif_tx, clk_mst_spd, p_mclk_in);
#endif
#ifdef ADAT_TX
configure_clock_src(clk_mst_spd, p_mclk_in);
configure_out_port_no_ready(p_adat_tx, clk_mst_spd, 0);
set_clock_fall_delay(clk_mst_spd, 7);
start_clock(clk_mst_spd);
#endif
/* Perform required CODEC/ADC/DAC initialisation */
AudioHwInit(c_config);