Added main.xc
This commit is contained in:
Ross Owen
273
module_usb_aud_shared/main.xc
Executable file
273
module_usb_aud_shared/main.xc
Executable file
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/**
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* @file main.xc
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* @brief Top level for XMOS USB 2.0 Audio 2.0 Reference Designs.
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* @author Ross Owen, XMOS Semiconductor Ltd
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*/
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#include <syscall.h>
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#include <platform.h>
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#include <xs1.h>
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#include <xclib.h>
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#include <print.h>
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#include <xscope.h>
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#include "xud.h" /* XMOS USB Device Layer defines and functions */
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#include "usb.h" /* Defines from the USB 2.0 Specification */
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#include "devicedefines.h" /* Device specific defines */
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#include "endpoint0.h"
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#include "usb_buffer.h"
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#include "decouple.h"
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#include "usb_midi.h"
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#include "audio.h"
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#include "ports.h" /* Portmap defines and ports for current app instance */
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/* Audio I/O */
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#if I2S_WIRES_DAC > 0
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on stdcore[0] : buffered out port:32 p_i2s_dac[I2S_WIRES_DAC] =
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{PORT_I2S_DAC0,
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#endif
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#if I2S_WIRES_DAC > 1
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PORT_I2S_DAC1,
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#endif
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#if I2S_WIRES_DAC > 2
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PORT_I2S_DAC2,
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#endif
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#if I2S_WIRES_DAC > 3
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PORT_I2S_DAC3,
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#endif
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#if I2S_WIRES_DAC > 4
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PORT_I2S_DAC4,
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#endif
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#if I2S_WIRES_DAC > 5
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PORT_I2S_DAC5,
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#endif
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#if I2S_WIRES_DAC > 6
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PORT_I2S_DAC6,
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#endif
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#if I2S_WIRES_DAC > 7
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#error Not supported
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#endif
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#if I2S_WIRES_DAC > 0
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};
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#endif
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#if I2S_WIRES_ADC > 0
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on stdcore[0] : buffered in port:32 p_i2s_adc[I2S_WIRES_ADC] =
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{PORT_I2S_ADC0,
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#endif
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#if I2S_WIRES_ADC > 1
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PORT_I2S_ADC1,
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#endif
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#if I2S_WIRES_ADC > 2
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PORT_I2S_ADC2,
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#endif
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#if I2S_WIRES_ADC > 3
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PORT_I2S_ADC3,
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#endif
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#if I2S_WIRES_ADC > 4
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PORT_I2S_ADC4,
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#endif
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#if I2S_WIRES_ADC > 5
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PORT_I2S_ADC5,
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#endif
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#if I2S_WIRES_ADC > 6
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PORT_I2S_ADC6,
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#endif
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#if I2S_WIRES_ADC > 7
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#error Not supported
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#endif
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#if I2S_WIRES_ADC > 0
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};
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#endif
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on stdcore[0] : buffered out port:32 p_lrclk = PORT_I2S_LRCLK;
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on stdcore[0] : buffered out port:32 p_bclk = PORT_I2S_BCLK;
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on stdcore[0] : port p_mclk = PORT_MCLK_IN;
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on stdcore[0] : in port p_for_mclk_count = PORT_MCLK_COUNT;
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#ifdef SPDIF
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on stdcore[0] : buffered out port:32 p_spdif_tx = PORT_SPDIF_OUT;
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#endif
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#ifdef MIDI
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on stdcore[0] : port p_midi_tx = PORT_MIDI_OUT;
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on stdcore[0] : port p_midi_rx = PORT_MIDI_IN;
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#endif
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/* Clock blocks */
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#ifdef MIDI
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on stdcore[0] : clock clk_midi = XS1_CLKBLK_REF;
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#endif
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on stdcore[0] : clock clk_audio_mclk = XS1_CLKBLK_2; /* Master clock */
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on stdcore[0] : clock clk_audio_bclk = XS1_CLKBLK_3; /* Bit clock */
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#ifdef SPDIF
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on stdcore[0] : clock clk_mst_spd = XS1_CLKBLK_1;
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#endif
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/* L Series needs a port to use for USB reset */
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#ifdef ARCH_L
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#ifdef PORT_USB_RESET
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on stdcore[0] : out port p_usb_rst = PORT_USB_RESET;
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#else
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#error Need a USB Reset port for L series
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#endif
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/* L Series also needs a clock for this port */
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clock clk = XS1_CLKBLK_4;
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#else
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/* Reset port not required for SU1 due to built in Phy */
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#define p_usb_rst null
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#define clk null
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#endif
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/* Endpoint type tables for XUD */
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XUD_EpType epTypeTableOut[NUM_EP_OUT] = { XUD_EPTYPE_CTL | XUD_STATUS_ENABLE,
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XUD_EPTYPE_ISO, /* Audio */
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#ifdef MIDI
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XUD_EPTYPE_BUL /* MIDI */
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#endif
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};
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XUD_EpType epTypeTableIn[NUM_EP_IN] = { XUD_EPTYPE_CTL | XUD_STATUS_ENABLE,
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XUD_EPTYPE_ISO,
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XUD_EPTYPE_ISO,
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XUD_EPTYPE_BUL,
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#ifdef MIDI
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XUD_EPTYPE_BUL,
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#endif
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#ifdef HID_CONTROLS
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XUD_EPTYPE_BUL,
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#endif
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};
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#define FAST_MODE 0
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void thread_speed()
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{
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#if (FAST_MODE)
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set_thread_fast_mode_on();
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#else
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set_thread_fast_mode_off();
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#endif
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}
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#ifdef XSCOPE
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void xscope_user_init()
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{
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xscope_register(0, 0, "", 0, "");
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xscope_config_io(XSCOPE_IO_BASIC);
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}
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#endif
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on stdcore[0] : out port p_test = XS1_PORT_32A;
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int main()
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{
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chan c_sof;
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chan c_xud_out[NUM_EP_OUT]; /* Endpoint channels for XUD */
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chan c_xud_in[NUM_EP_IN];
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chan c_aud_ctl;
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chan c_mix_out;
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#ifdef MIDI
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chan c_midi;
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#endif
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#ifdef TEST_MODE_SUPPORT
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#warning Building with test mode support
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chan c_usb_test;
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#else
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#define c_usb_test null
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#endif
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#ifdef SU1_ADC
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chan c_adc;
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#else
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#define c_adc null
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#endif
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//SPI_SS Mux - disable access to SPI_SS
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//p_gpio <: 1;
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par
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{
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/* USB Interface */
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#if (AUDIO_CLASS==2)
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on stdcore[0]: XUD_Manager(c_xud_out, NUM_EP_OUT, c_xud_in, NUM_EP_IN,
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c_sof, epTypeTableOut, epTypeTableIn, p_usb_rst,
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clk, 1, XUD_SPEED_HS, c_usb_test);
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#else
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on stdcore[0]:XUD_Manager(c_xud_out, NUM_EP_OUT, c_xud_in, NUM_EP_IN,
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c_sof, epTypeTableOut, epTypeTableIn, p_usb_rst,
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clk, 1, XUD_SPEED_FS, c_usb_test);
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#endif
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/* Endpoint 0 */
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on stdcore[0]:{
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thread_speed();
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Endpoint0( c_xud_out[0], c_xud_in[0], c_aud_ctl, null,null, c_usb_test);
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}
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on stdcore[0]:
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{
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thread_speed();
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/* Attach mclk count port to mclk clock-block (for feedback) */
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//set_port_clock(p_for_mclk_count, clk_audio_mclk);
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{
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unsigned x;
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asm("ldw %0, dp[clk_audio_mclk]":"=r"(x));
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asm("setclk res[%0], %1"::"r"(p_for_mclk_count), "r"(x));
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}
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buffer(c_xud_out[EP_NUM_OUT_AUD],/* Audio Out*/
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c_xud_in[EP_NUM_IN_AUD], /* Audio In */
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c_xud_in[EP_NUM_IN_FB], /* Audio FB */
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#ifdef MIDI
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c_xud_out[EP_NUM_OUT_MIDI], /* MIDI Out */ // 2
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c_xud_in[EP_NUM_IN_MIDI], /* MIDI In */ // 4
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c_midi,
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#endif
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c_xud_in[EP_NUM_IN_AUD_INT], /* Int */
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c_sof, c_aud_ctl, p_for_mclk_count
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#ifdef HID_CONTROLS
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,c_xud_in[EP_NUM_IN_HID]
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#endif
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);
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}
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on stdcore[0]:
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{
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thread_speed();
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decouple(c_mix_out, null);
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}
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on stdcore[0]:
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{
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thread_speed();
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/* Audio I/O (pars additional S/PDIF TX thread) */
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audio(c_mix_out, null, null, c_adc);
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}
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//on stdcore[0]: test(c_adc2);
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#ifdef MIDI
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on stdcore[0]:
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{
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thread_speed();
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usb_midi(p_midi_rx, p_midi_tx, clk_midi, c_midi, 0, null, null, null, null);
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}
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#endif
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#ifdef SU1_ADC
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xs1_su_adc_service(c_adc);
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#endif
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}
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return 0;
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}
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