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@@ -10,6 +10,44 @@ If using the "codeless" programming model then the steps in this section are inf
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I2S/TDM
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~~~~~~~
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S/PDIF Transmit
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~~~~~~~~~~~~~~~
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I2S/TDM is typically fundamental to most products and is built into the ``XUA_AudioHub()`` core.
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In order to enable I2S on must declare an array of ports for the data-lines (one for each direction)::
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/* Port declarations. Note, the defines come from the xn file */
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buffered out port:32 p_i2s_dac[] = {PORT_I2S_DAC0}; /* I2S Data-line(s) */
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buffered in port:32 p_i2s_adc[] = {PORT_I2S_ADC0}; /* I2S Data-line(s) */
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Ports for the sample and bit clocks are also required::
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buffered out port:32 p_lrclk = PORT_I2S_LRCLK; /* I2S Bit-clock */
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buffered out port:32 p_bclk = PORT_I2S_BCLK; /* I2S L/R-clock */
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.. note::
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All of these ports must be buffered, width 32
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These ports must then be passed to the ``XUA_AudioHub()`` task appropriately.
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.. note::
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Based on whether the xCORE is bus slave/master the ports must be declared as input/output respectively
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I2S functionality also requires two clock-blocks, one for bit and sample clock e.g.::
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/* Clock-block declarations */
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clock clk_audio_bclk = on tile[0]: XS1_CLKBLK_4; /* Bit clock */
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clock clk_audio_mclk = on tile[0]: XS1_CLKBLK_5; /* Master clock */
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These hardware resources must be passed into the call to ``XUA_AudioHub()``::
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/* AudioHub/IO core does most of the audio IO i.e. I2S (also serves as a hub for all audio) */
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on tile[0]: XUA_AudioHub(c_aud, clk_audio_mclk, clk_audio_bclk, p_mclk_in, p_lrclk, p_bclk);
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For configuration options, master vs slave, TDM etc please see the API section.
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