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xpd: Cleaned up whitespace

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This commit is contained in:
Ross Owen
2024-03-22 17:52:35 +00:00
parent 8f63590956
commit 9ba6425d83
7 changed files with 20 additions and 20 deletions
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10
lib_xua/api/xua_audiohub.h
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@@ -42,11 +42,11 @@
*
* \param c_dig Channel connected to the clockGen() thread for
* receiving/transmitting samples
*
*
* \param c_audio_rate_change Channel notifying ep_buffer of an mclk frequency change and sync for stable clock
*
*
* \param dfuInterface Interface supporting DFU methods
*
*
* \param c_pdm_in Channel for receiving decimated PDM samples
*/
void XUA_AudioHub(chanend ?c_aud,
@@ -108,9 +108,9 @@ void UserBufferManagement(unsigned sampsFromUsbToAudio[], unsigned sampsFromAudi
*
* This function is called once, before the first call to UserBufferManagement(), and can be used to initialise any
* related user state
*
*
* \param sampFreq The initial sample frequency
*
*
*/
void UserBufferManagementInit(unsigned sampFreq);

2
lib_xua/api/xua_clocking.h
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@@ -31,7 +31,7 @@ void PllRefPinTask(server interface pll_ref_if i_pll_ref, out port p_sync);
* \param c_audio_rate_change channel to notify of master clock change
* \param p_for_mclk_count_aud port used for counting mclk and providing a timestamp
* \param c_sw_pll channel used to communicate with software PLL task
*
*
*/
void clockGen( streaming chanend ?c_spdif_rx,
chanend ?c_adat_rx,

8
lib_xua/src/core/buffer/ep/ep_buffer.xc
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@@ -382,7 +382,7 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
1, /* How often the PFD is invoked per call */
masterClockFreq / controller_rate_hz, /* pll ratio integer */
0, /* Assume precise timing of sampling */
pfd_ppm_max);
pfd_ppm_max);
outuint(c_sw_pll, masterClockFreq);
outct(c_sw_pll, XS1_CT_END);
inuint(c_sw_pll); /* receive ACK */
@@ -561,11 +561,11 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
GET_SHARED_GLOBAL(usbSpeed, g_curUsbSpeed);
static int sofCount = 0;
#if (XUA_USE_SW_PLL)
/* Run PFD and sw_pll controller at 100Hz */
/* Run PFD and sw_pll controller at 100Hz */
const int sofFreqDivider = (usbSpeed == XUD_SPEED_HS) ? (8000 / controller_rate_hz) : (1000 / controller_rate_hz);
#else /* (XUA_USE_SW_PLL) */
/* 1000 toggles per second for CS2100 reference -> 500 Hz */
const int toggleRateHz = 1000;
const int toggleRateHz = 1000;
const int sofFreqDivider = (usbSpeed == XUD_SPEED_HS) ? (8000 / toggleRateHz) : (1000 / toggleRateHz);
#endif /* (XUA_USE_SW_PLL) */
@@ -1050,7 +1050,7 @@ void XUA_Buffer_Ep(register chanend c_aud_out,
case inuint_byref(c_sw_pll, u_tmp):
inct(c_sw_pll);
c_audio_rate_change <: 0; /* ACK back to audio to release */
break;
#endif /* (XUA_USE_SW_PLL) */
#endif /* (XUA_SYNCMODE == XUA_SYNCMODE_SYNC) */

8
lib_xua/src/core/clocking/clockgen.xc
View File

@@ -244,7 +244,7 @@ void clockGen ( streaming chanend ?c_spdif_rx,
#if (XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN)
timer t_external;
unsigned selected_mclk_rate = MCLK_48; // Assume 24.576MHz initial clock
unsigned selected_mclk_rate = MCLK_48; // Assume 24.576MHz initial clock
unsigned selected_sample_rate = 0;
#if XUA_USE_SW_PLL
@@ -521,7 +521,7 @@ void clockGen ( streaming chanend ?c_spdif_rx,
#if ((XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && XUA_USE_SW_PLL)
case inuint_byref(c_sw_pll, tmp):
inct(c_sw_pll);
inct(c_sw_pll);
/* Send ACK back to audiohub to allow I2S to start
This happens only on SDM restart and only once */
if(require_ack_to_audio)
@@ -650,7 +650,7 @@ void clockGen ( streaming chanend ?c_spdif_rx,
#if XUA_USE_SW_PLL
/* record time of sample */
asm volatile(" getts %0, res[%1]" : "=r" (mclk_time_stamp) : "r" (p_for_mclk_count_aud));
#endif
#endif
t_local :> adatReceivedTime;
/* Sync is: 1 | (user_byte << 4) */
@@ -753,7 +753,7 @@ void clockGen ( streaming chanend ?c_spdif_rx,
/* Toggle edge */
i_pll_ref.toggle_timed(1);
#endif
/* Reset counters */
adatCounters.receivedSamples = 0;
}

4
lib_xua/src/core/clocking/sw_pll_wrapper.h
View File

@@ -25,7 +25,7 @@ void sw_pll_task(chanend c_sw_pll);
/** Helper function that sends a special restart command. It causes the SDM task
* to quit and restart using the new mclk.
*
*
* \param c_sw_pll Channel connected to the clocking thread to pass raw error terms.
* \param mclk_Rate The mclk frequency in Hz.
*/
@@ -45,7 +45,7 @@ void do_sw_pll_phase_frequency_detector_dig_rx( unsigned short mclk_time_stamp,
int receivedSamples,
int &reset_sw_pll_pfd);
/** Initilaises the software PLL both hardware and state. Sets the mclk frequency to a nominal point.
/** Initilaises the software PLL both hardware and state. Sets the mclk frequency to a nominal point.
*
* \param sw_pll Reference to a software pll state struct to be initialised.
* \param mClk The current nominal mClk frequency.

6
lib_xua/src/core/clocking/sw_pll_wrapper.xc
View File

@@ -108,7 +108,7 @@ void do_sw_pll_phase_frequency_detector_dig_rx( unsigned short mclk_time_stamp,
/* send PFD output to the sigma delta thread */
outuint(c_sw_pll, (int) f_error);
outct(c_sw_pll, XS1_CT_END);
last_mclk_time_stamp = mclk_time_stamp;
control_loop_counter = 0;
total_received_samples = 0;
@@ -117,8 +117,8 @@ void do_sw_pll_phase_frequency_detector_dig_rx( unsigned short mclk_time_stamp,
void sw_pll_task(chanend c_sw_pll){
/* Zero is an invalid number and the SDM will not write the frac reg until
the first control value has been received. This avoids issues with
channel lockup if two tasks (eg. init and SDM) try to write at the same time. */
the first control value has been received. This avoids issues with
channel lockup if two tasks (eg. init and SDM) try to write at the same time. */
while(1)
{

2
lib_xua/src/core/main.xc
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@@ -382,7 +382,7 @@ void usb_audio_io(chanend ?c_aud_in,
#endif
#if (XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN)
, c_dig_rx
#endif
#endif
#if (XUA_SYNCMODE == XUA_SYNCMODE_SYNC || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN)
, c_audio_rate_change
#endif