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Changelog update

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xross
2022-09-28 11:27:12 +01:00
parent e1d0974912
commit b7a90a3235
3 changed files with 13 additions and 8 deletions
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CHANGELOG.rst
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@@ -7,6 +7,9 @@ UNRELEASED
* CHANGED: Define ADAT_RX renamed to XUA_ADAT_RX_EN
* CHANGED: Define ADAT_TX renamed to XUA_ADAT_TX_EN
* CHANGED: Define SPDIF_RX renamed to XUA_SPDIF_RX_EN
* CHANGED: Drive strength of I2S clock lines upped to 8mA on xCORE.ai
* CHANGED: ADC datalines sampled on falling edge of clock in TDM mode
* CHANGED: Improved startup behaviour of TDM clocks
* FIXED: Intermittent underflow at MAX_FREQ on input stream start due to
insufficient packet buffering