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BCD_DEVICE version bump

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This commit is contained in:
Ross Owen
2016-08-02 16:19:38 -04:00
parent 084863d720
commit c67f5e454d
5 changed files with 52 additions and 9 deletions
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4
module_usb_audio/audio_io/audio_io.xc
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@@ -394,7 +394,7 @@ static inline void InitPorts(unsigned divide)
p_lrclk when pinseq(0) :> void @ tmp;
#endif
tmp += (I2S_CHANS_PER_FRAME * 32) - 32 + 1 ;
tmp += (I2S_CHANS_PER_FRAME * 32) - 32 + 1 + (I2S_CHANS_PER_FRAME *32) - 2;
/* E.g. 2 * 32 - 32 + 1 = 33 for stereo */
/* E.g. 8 * 32 - 32 + 1 = 225 for 8 chan TDM */
@@ -410,7 +410,7 @@ static inline void InitPorts(unsigned divide)
#pragma loop unroll
for(int i = 0; i < I2S_WIRES_ADC; i++)
{
asm("setpt res[%0], %1"::"r"(p_i2s_adc[i]),"r"(tmp-1));
asm("setpt res[%0], %1"::"r"(p_i2s_adc[i]),"r"(tmp));
}
#endif
#endif

3
module_usb_audio/devicedefines.h
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@@ -475,7 +475,7 @@
* @brief Device firmware version number in Binary Coded Decimal format: 0xJJMN where JJ: major, M: minor, N: sub-minor version number.
*/
#ifndef BCD_DEVICE_M
#define BCD_DEVICE_M 18
#define BCD_DEVICE_M 19
#endif
/**
@@ -1146,6 +1146,7 @@ enum USBEndpointNumber_In
enum USBEndpointNumber_Out
{
ENDPOINT_NUMBER_OUT_CONTROL, /* Endpoint 0 */
XXXX,
ENDPOINT_NUMBER_OUT_AUDIO,
#ifdef MIDI
ENDPOINT_NUMBER_OUT_MIDI,

7
module_usb_audio/endpoint0/audiorequests.xc
View File

@@ -886,8 +886,8 @@ int AudioClassRequests_2(XUD_ep ep0_out, XUD_ep ep0_in, USB_SetupPacket_t &sp, c
}
/* Just keep doubling for standard freqs >= 44.1/48kHz */
currentFreq44 = 44100;
currentFreq48 = 48000;
currentFreq44 = MIN_FREQ_44;
currentFreq48 = MIN_FREQ_48;
while(1)
{
if((currentFreq44 <= maxFreq) && (currentFreq44 >= MIN_FREQ))
@@ -897,7 +897,8 @@ int AudioClassRequests_2(XUD_ep ep0_out, XUD_ep ep0_in, USB_SetupPacket_t &sp, c
currentFreq44*=2;
}
if((currentFreq48 <= maxFreq))
if((currentFreq48 <= maxFreq) && (currentFreq48 >= MIN_FREQ))
{
/* Note i passed byref here */
storeFreq(buffer, i, currentFreq48);

4
module_usb_audio/endpoint0/descriptors.h
View File

@@ -562,7 +562,7 @@ unsigned char hidReportDescriptor[] =
#error
#endif
#define FS_STREAM_FORMAT_OUTPUT_1_MAXPACKETSIZE (MAX_PACKET_SIZE_MULT_OUT_FS * FS_STREAM_FORMAT_OUTPUT_1_SUBSLOT_BYTES)
#define FS_STREAM_FORMAT_OUTPUT_1_MAXPACKETSIZE (MAX_PACKET_SIZE_MULT_OUT_FS * FS_STREAM_FORMAT_OUTPUT_1_SUBSLOT_BYTES)*2
#define FS_STREAM_FORMAT_OUTPUT_2_MAXPACKETSIZE (MAX_PACKET_SIZE_MULT_OUT_FS * FS_STREAM_FORMAT_OUTPUT_2_SUBSLOT_BYTES)
#define FS_STREAM_FORMAT_OUTPUT_3_MAXPACKETSIZE (MAX_PACKET_SIZE_MULT_OUT_FS * FS_STREAM_FORMAT_OUTPUT_3_SUBSLOT_BYTES)
@@ -2268,7 +2268,7 @@ const unsigned num_freqs_a1 = MAX(3, (0
#define CHARIFY_SR(x) (x & 0xff),((x & 0xff00)>> 8),((x & 0xff0000)>> 16)
#if (MIN_FREQ_FS < 12000) && (MAX_FREQ_FS > 48000)
#error SAMPLE RATE RANGE TO GREAT FOR UAC1 ON WINDOWS
#error SAMPLE RATE RANGE TOO GREAT FOR UAC1 ON WINDOWS
#endif
unsigned char cfgDesc_Audio1[] =

43
module_usb_audio/ports/audioports.xc
View File

@@ -59,6 +59,13 @@ unsigned int divide, unsigned curSamFreq)
/* Clock bitclock clock block from master clock pin (divided) */
configure_clock_src_divide(clk_audio_bclk, p_mclk_in, (divide/2));
configure_port_clock_output(p_bclk, clk_audio_bclk);
if(divide == 1)
{
}
#else
/* For a divide of one (i.e. bitclock == master-clock) BClk is set to clock_output mode.
* In this mode it outputs an edge clock on every tick of itsassociated clock_block.
@@ -83,7 +90,39 @@ unsigned int divide, unsigned curSamFreq)
}
#endif
stop_clock(clk_audio_mclk);
set_clock_fall_delay(clk_audio_mclk, 0);
start_clock(clk_audio_mclk);
if(divide == 1)
{
stop_clock(clk_audio_mclk);
set_clock_fall_delay(clk_audio_mclk, 10);
if(!isnull(p_lrclk))
{
/* Clock LR clock from bit clock-block */
configure_out_port_no_ready(p_lrclk, clk_audio_mclk, 0);
}
#if (I2S_CHANS_DAC != 0)
/* Clock I2S output data ports from clock block */
for(int i = 0; i < numPortsDac; i++)
{
configure_out_port_no_ready(p_i2s_dac[i], clk_audio_mclk, 0);
}
#endif
#if (I2S_CHANS_ADC != 0)
/* Clock I2S input data ports from clock block */
for(int i = 0; i < numPortsAdc; i++)
{
configure_in_port_no_ready(p_i2s_adc[i], clk_audio_mclk);
}
#endif
start_clock(clk_audio_mclk);
}
else
{if(!isnull(p_lrclk))
{
/* Clock LR clock from bit clock-block */
configure_out_port_no_ready(p_lrclk, clk_audio_bclk, 0);
@@ -104,6 +143,8 @@ unsigned int divide, unsigned curSamFreq)
configure_in_port_no_ready(p_i2s_adc[i], clk_audio_bclk);
}
#endif
}
/* Start clock blocks ticking */
start_clock(clk_audio_bclk);
@@ -126,7 +167,7 @@ unsigned int divide, unsigned curSamFreq)
bClkDelay_fall = 18;
}
set_clock_fall_delay(clk_audio_bclk, bClkDelay_fall);
//set_clock_fall_delay(clk_audio_bclk, bClkDelay_fall);
#if (I2S_CHANS_DAC != 0)
/* Clock I2S output data ports from b-clock clock block */