Support lib_i2c in legacy_tests (#242)

Support lib_i2c in legacy_tests and remove dummy module_locks
This commit is contained in:
danielpieczko
2022-02-18 11:39:28 +00:00
committed by GitHub
parent 0ad3048e63
commit 29c9b3ea75
4 changed files with 39 additions and 36 deletions

View File

@@ -1,7 +1,5 @@
# Copyright (c) 2016, XMOS Ltd, All rights reserved
TARGET = xk-audio-216-mc.xn
USED_MODULES = lib_xua \
module_i2c_shared module_i2c_single_port lib_logging
USED_MODULES = lib_xua lib_i2c lib_logging
BUILD_FLAGS = -O0 -g -lflash -DXUD_SERIES_SUPPORT=4 -DXUD_CORE_CLOCK=600 -fxscope -save-temps -march=xs2a -DUSB_TILE=tile[1]

View File

@@ -1,4 +1,4 @@
// Copyright 2016-2021 XMOS LIMITED.
// Copyright 2016-2022 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1.
#ifdef HARDWARE
@@ -8,7 +8,7 @@
#include "devicedefines.h"
#include <platform.h>
#include "gpio_access.h"
#include "i2c_shared.h"
#include "i2c.h"
#include "cs4384.h"
#include "cs5368.h"
#include "cs2100.h"
@@ -25,16 +25,10 @@
on tile[0] : out port p_gpio = XS1_PORT_8C;
#ifndef IAP
/* If IAP not enabled, i2c ports not declared - still needs for DAC config */
on tile [0] : struct r_i2c r_i2c = {XS1_PORT_4A};
#else
extern struct r_i2c r_i2c;
#endif
port p_i2c = on tile[0]:PORT_I2C;
#define DAC_REGWRITE(reg, val) {data[0] = val; i2c_shared_master_write_reg(r_i2c, CS4384_I2C_ADDR, reg, data, 1);}
#define DAC_REGREAD(reg, val) {i2c_shared_master_read_reg(r_i2c, CS4384_I2C_ADDR, reg, val, 1);}
#define ADC_REGWRITE(reg, val) {data[0] = val; i2c_shared_master_write_reg(r_i2c, CS5368_I2C_ADDR, reg, data, 1);}
#define DAC_REGWRITE(reg, val) {result = i2c.write_reg(CS4384_I2C_ADDR, reg, val);}
#define ADC_REGWRITE(reg, val) {result = i2c.write_reg(CS5368_I2C_ADDR, reg, val);}
#ifdef USE_FRACTIONAL_N
@@ -45,14 +39,15 @@ extern struct r_i2c r_i2c;
#define PLL_SYNC_FREQ 300
#endif
#define CS2100_REGREAD(reg, data) {data[0] = 0xAA; i2c_master_read_reg(CS2100_I2C_DEVICE_ADDR, reg, data, 1, r_i2c);}
#define CS2100_REGREAD_ASSERT(reg, data, expected) {data[0] = 0xAA; i2c_master_read_reg(CS2100_I2C_DEVICE_ADDR, reg, data, 1, r_i2c); assert(data[0] == expected);}
#define CS2100_REGWRITE(reg, val) {data[0] = val; i2c_master_write_reg(CS2100_I2C_DEVICE_ADDR, reg, data, 1, r_i2c);}
#define CS2100_REGREAD(reg, data) {data[0] = i2c.read_reg(CS2100_I2C_DEVICE_ADDR, reg, result);}
#define CS2100_REGREAD_ASSERT(reg, data, expected) {data[0] = i2c.read_reg(CS2100_I2C_DEVICE_ADDR, reg, result); assert(data[0] == expected);}
#define CS2100_REGWRITE(reg, val) {result = i2c.write_reg(CS2100_I2C_DEVICE_ADDR, reg, val);}
/* Init of CS2100 */
void PllInit(void)
void PllInit(client interface i2c_master_if i2c)
{
unsigned char data[1] = {0};
i2c_regop_res_t result;
#if XCORE_200_MC_AUDIO_HW_VERSION < 2
/* Enable init */
@@ -73,12 +68,15 @@ void PllInit(void)
CS2100_REGREAD_ASSERT(CS2100_GLOBAL_CONFIG, data, 0x01);
CS2100_REGREAD_ASSERT(CS2100_FUNC_CONFIG_1, data, 0x08);
CS2100_REGREAD_ASSERT(CS2100_FUNC_CONFIG_2, data, 0x00);
i2c.shutdown();
}
/* Setup PLL multiplier */
void PllMult(unsigned output, unsigned ref)
void PllMult(unsigned output, unsigned ref, client interface i2c_master_if i2c)
{
unsigned char data[1] = {0};
i2c_regop_res_t result;
/* PLL expects 12:20 format, convert output and ref to 12:20 */
/* Shift up the dividend by 12 to retain format... */
@@ -120,9 +118,6 @@ void AudioHwInit(chanend ?c_codec)
start_clock(clk_pll_sync);
#endif
/* Init the i2c module */
i2c_shared_master_init(r_i2c);
/* Assert reset to ADC and DAC */
set_gpio(P_GPIO_DAC_RST_N, 0);
set_gpio(P_GPIO_ADC_RST_N, 0);
@@ -143,7 +138,12 @@ void AudioHwInit(chanend ?c_codec)
set_gpio(P_GPIO_PLL_SEL, 1);
/* Initialise external PLL */
PllInit();
i2c_master_if i2c[1];
par
{
i2c_master_single_port(i2c, 1, p_i2c, 10, 0, 1, 0);
PllInit(i2c[0]);
}
#endif
#ifdef IAP
@@ -155,10 +155,11 @@ void AudioHwInit(chanend ?c_codec)
/* Configures the external audio hardware for the required sample frequency.
* See gpio.h for I2C helper functions and gpio access
*/
void AudioHwConfig(unsigned samFreq, unsigned mClk, chanend ?c_codec, unsigned dsdMode,
unsigned sampRes_DAC, unsigned sampRes_ADC)
void AudioHwConfig2(unsigned samFreq, unsigned mClk, chanend ?c_codec, unsigned dsdMode,
unsigned sampRes_DAC, unsigned sampRes_ADC, client interface i2c_master_if i2c)
{
unsigned char data[1] = {0};
unsigned char data[1] = {0};
i2c_regop_res_t result;
/* Put ADC and DAC into reset */
set_gpio(P_GPIO_ADC_RST_N, 0);
@@ -167,7 +168,7 @@ void AudioHwConfig(unsigned samFreq, unsigned mClk, chanend ?c_codec, unsigned d
/* Set master clock select appropriately */
#if defined(USE_FRACTIONAL_N)
/* Configure external fractional-n clock multiplier for 300Hz -> mClkFreq */
PllMult(mClk, PLL_SYNC_FREQ);
PllMult(mClk, PLL_SYNC_FREQ, i2c);
#endif
/* Allow some time for mclk to lock and MCLK to stabilise - this is important to avoid glitches at start of stream */
{
@@ -365,8 +366,20 @@ void AudioHwConfig(unsigned samFreq, unsigned mClk, chanend ?c_codec, unsigned d
DAC_REGWRITE(CS4384_MODE_CTRL, 0b10000000);
}
#endif
i2c.shutdown();
return;
}
//:
void AudioHwConfig(unsigned samFreq, unsigned mClk, chanend ?c_codec, unsigned dsdMode,
unsigned sampRes_DAC, unsigned sampRes_ADC)
{
i2c_master_if i2c[1];
par
{
i2c_master_single_port(i2c, 1, p_i2c, 10, 0, 1, 0);
AudioHwConfig2(samFreq, mClk, c_codec, dsdMode, sampRes_DAC, sampRes_ADC, i2c[0]);
}
}
#endif

View File

@@ -1,7 +0,0 @@
module_locks Readme
===================
:scope: Dummy module
:description: Allows compiling legacy_tests in lib_xua with lib_locks. sc_i2c is used in the tests and it requires module_locks from sc_util, but the definitions in sc_utils conflict with the ones in lib_locks.
:keywords: dummy
:boards: XMOS Dev Kit

View File

@@ -1 +0,0 @@
# Dummy module used in legacy_tests. See README.rst for more details.