Non-I2s build fix

CHANGELOG.rst

@@ -1,6 +1,10 @@
 lib_xua Change Log
 ==================
 
+0.1.1
+-----
+    - RESOLVED:   Configurations where I2S_CHANS_DAC and I2S_CHANS_ADC are both 0 now build
+
 0.1.0
 -----
     - ADDED:      FB_USE_REF_CLOCK to allow feedback generation from xCORE internal reference

lib_xua/src/core/ports/audioports.c

@@ -55,8 +55,10 @@ unsigned int divide, unsigned curSamFreq, unsigned int dsdMode)
                 p_adc,
                 numPortsAdc,
 #endif
+#if (I2S_CHANS_DAC != 0) || (I2S_CHANS_ADC != 0)
                 p_lrclk,
                 p_bclk,
+#endif
                 divide, curSamFreq);
 }
 

lib_xua/src/core/ports/audioports.xc

@@ -32,11 +32,14 @@ void ConfigAudioPorts(
 #endif
 unsigned int divide, unsigned curSamFreq)
 {
+#if (I2S_CHANS_DAC != 0) || (I2S_CHANS_ADC != 0)
+
 #if (CODEC_MASTER == 0)
     /* Note this call to stop_clock() will pause forever if the port clocking the clock-block is not low.
      * deliver() should return with this being the case */
     stop_clock(clk_audio_bclk);
 
+
     if(!isnull(p_lrclk))
     {
         clearbuf(p_lrclk);
@@ -65,6 +68,7 @@ unsigned int divide, unsigned curSamFreq)
         configure_port_clock_output(p_bclk, clk_audio_bclk);
     }
 #else
+    #error XS1 no longer supported in audio core 
     /* For a divide of one (i.e. bitclock == master-clock) BClk is set to clock_output mode.
      * In this mode it outputs an edge clock on every tick of itsassociated clock_block.
      *
@@ -153,5 +157,6 @@ unsigned int divide, unsigned curSamFreq)
 
     start_clock(clk_audio_bclk);
 #endif
+#endif
 }