Copyright and port clash fix

This commit is contained in:
Ed
2024-04-24 12:45:26 +01:00
parent 9201d7a570
commit a3670d6b85
3 changed files with 2 additions and 12 deletions

View File

@@ -13,13 +13,6 @@ on tile[0]: out port p_ctrl = XS1_PORT_8D; /* p_ctrl:
* [7] - MCLK_DIR (Out:0, In: 1)
*/
on tile[0]: in port p_margin = XS1_PORT_1G; /* CORE_POWER_MARGIN: Driven 0: 0.925v
* Pull down: 0.922v
* High-z: 0.9v
* Pull-up: 0.854v
* Driven 1: 0.85v
*/
#define USE_FRACTIONAL_N (0)
#if (USE_FRACTIONAL_N)
@@ -34,9 +27,6 @@ void board_setup()
/* "Drive high mode" - drive high for 1, non-driving for 0 */
set_port_drive_high(p_ctrl);
/* Ensure high-z for 0.9v */
p_margin :> void;
/* Drive control port to turn on 3V3 and mclk direction appropriately.
* Bits set to low will be high-z, pulled down */
p_ctrl <: EXT_PLL_SEL__MCLK_DIR | 0x20;

View File

@@ -1,4 +1,4 @@
// Copyright 2021-2022 XMOS LIMITED.
// Copyright 2021-2024 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1.
#include <stddef.h>
#include <stdio.h>

View File

@@ -1,4 +1,4 @@
// Copyright 2021-2022 XMOS LIMITED.
// Copyright 2021-2024 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1.
#include <stddef.h>
#include <stdio.h>