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Building but not tested merge

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Ed
2024-01-15 17:00:54 +00:00
parent aac2b4b7fb
commit ca16467158
6 changed files with 521 additions and 541 deletions
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10
lib_xua/api/xua_clocking.h
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@@ -6,6 +6,8 @@
#include <xs1.h>
#include "sw_pll_wrapper.h"
interface pll_ref_if
{
void toggle();
@@ -26,9 +28,10 @@ void PllRefPinTask(server interface pll_ref_if i_pll_ref, out port p_sync);
* clock
* \param c_clk_int channel connected to the decouple() thread for clock
* interrupts
* \param p_for_mclk_count_aud port used for counting mclk and providing a timestamp
*
* \param c_mclk_change channel to notify of master clock change
* \param p_for_mclk_count_aud port used for counting mclk and providing a timestamp
* \param c_sw_pll channel used to communicate with software PLL task
*
*/
void clockGen( streaming chanend ?c_spdif_rx,
chanend ?c_adat_rx,
@@ -36,8 +39,9 @@ void clockGen( streaming chanend ?c_spdif_rx,
chanend c_audio,
chanend c_clk_ctl,
chanend c_clk_int,
chanend c_mclk_change,
port ?p_for_mclk_count_aud,
chanend c_mclk_change);
chanend ?c_sw_pll);
#if (XUA_USE_APP_PLL)

11
lib_xua/src/core/audiohub/xua_audiohub.xc
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@@ -636,9 +636,9 @@ void XUA_AudioHub(chanend ?c_aud, clock ?clk_audio_mclk, clock ?clk_audio_bclk,
buffered _XUA_CLK_DIR port:32 ?p_bclk,
buffered out port:32 (&?p_i2s_dac)[I2S_WIRES_DAC],
buffered in port:32 (&?p_i2s_adc)[I2S_WIRES_ADC]
#if (XUA_USE_APP_PLL)
, client interface SoftPll_if i_softPll
#endif
#if (XUA_USE_APP_PLL)
, client interface SoftPll_if i_softPll
#endif
#if (XUA_SPDIF_TX_EN) //&& (SPDIF_TX_TILE != AUDIO_IO_TILE)
, chanend c_spdif_out
#endif
@@ -814,11 +814,6 @@ void XUA_AudioHub(chanend ?c_aud, clock ?clk_audio_mclk, clock ?clk_audio_bclk,
/* User should mute audio hardware */
AudioHwConfig_Mute();
#if (USE_SW_PLL)
// i_softPll.init(mClk);
#warning SORT THIS
#endif
/* User code should configure audio harware for SampleFreq/MClk etc */
AudioHwConfig(curFreq, mClk, dsdMode, curSamRes_DAC, curSamRes_ADC);
#if (XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN)

887
lib_xua/src/core/clocking/clockgen.xc
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File diff suppressed because it is too large Load Diff

14
lib_xua/src/core/clocking/sw_pll_wrapper.h
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@@ -27,29 +27,29 @@ extern "C"
/** Task that receives an error term, passes it through a PI controller and periodically
* calclulates a sigma delta output value and sends it to the PLL fractional register.
*
* \param c_sigma_delta Channel connected to the clocking thread to pass raw error terms.
* \param selected_mclk_rate_ptr Pointer to the mclk rate variable declared in clockgen.
* \param c_sw_pll Channel connected to the clocking thread to pass raw error terms.
*/
void SigmaDeltaTask(chanend c_sigma_delta, unsigned * unsafe selected_mclk_rate_ptr);
void sw_pll_task(chanend c_sw_pll);
/** Helper function that sends a special restart command. It causes the SDM task
* to quit and restart using the new mclk.
*
* \param c_sigma_delta Channel connected to the clocking thread to pass raw error terms.
* \param c_sw_pll Channel connected to the clocking thread to pass raw error terms.
* \param mclk_Rate The mclk frequency in Hz.
*/
void restart_sigma_delta(chanend c_sigma_delta);
void restart_sigma_delta(chanend c_sw_pll, unsigned mclk_rate);
/** Performs a frequency comparsion between the incoming digital Rx stream and the local mclk.
*
* \param mclk_time_stamp The captured mclk count (using port timer) at the time of sample Rx.
* \param mclks_per_sample The nominal number of mclks per audio sample.
* \param c_sigma_delta Channel connected to the sigma delta and controller thread.
* \param c_sw_pll Channel connected to the sigma delta and controller thread.
* \param receivedSamples The number of received samples since tha last call to this function.
* \param reset_sw_pll_pfd Reference to a flag which will be used to signal reset of this function's state.
*/
void do_sw_pll_phase_frequency_detector_dig_rx( unsigned short mclk_time_stamp,
unsigned mclks_per_sample,
chanend c_sigma_delta,
chanend c_sw_pll,
int receivedSamples,
int &reset_sw_pll_pfd);

107
lib_xua/src/core/clocking/sw_pll_wrapper.xc
View File

@@ -114,79 +114,82 @@ void do_sw_pll_phase_frequency_detector_dig_rx( unsigned short mclk_time_stamp,
}
}
void SigmaDeltaTask(chanend c_sigma_delta, unsigned * unsafe selected_mclk_rate_ptr){
void sw_pll_task(chanend c_sigma_delta){
/* Zero is an invalid number and the SDM will not write the frac reg until
the first control value has been received. This avoids issues with
channel lockup if two tasks (eg. init and SDM) try to write at the same time. */
int f_error = 0;
int dco_setting = 0; /* gets set at InitSWPLL */
unsigned sdm_interval = 0; /* gets set at InitSWPLL */
sw_pll_state_t sw_pll;
unsafe
while(1)
{
unsigned selected_mclk_rate = inuint(c_sigma_delta);
int f_error = 0;
int dco_setting = 0; /* gets set at InitSWPLL */
unsigned sdm_interval = 0; /* gets set at InitSWPLL */
sw_pll_state_t sw_pll;
/* initialse the SDM and gather SDM initial settings */
{sdm_interval, dco_setting} = InitSWPLL(sw_pll, (unsigned)*selected_mclk_rate_ptr);
}
{sdm_interval, dco_setting} = InitSWPLL(sw_pll, selected_mclk_rate);
tileref_t this_tile = get_local_tile_id();
tileref_t this_tile = get_local_tile_id();
timer tmr;
int32_t time_trigger;
tmr :> time_trigger;
int running = 1;
timer tmr;
int32_t time_trigger;
tmr :> time_trigger;
int running = 1;
outuint(c_sigma_delta, 0); /* Signal back via clockgen to audio to start I2S */
outuint(c_sigma_delta, 0); /* Signal back via clockgen to audio to start I2S */
unsigned rx_word = 0;
while(running)
{
/* Poll for new SDM control value */
select
unsigned rx_word = 0;
while(running)
{
case inuint_byref(c_sigma_delta, rx_word):
if(rx_word == DISABLE_SDM)
{
f_error = 0;
running = 0;
}
else
{
f_error = (int32_t)rx_word;
unsafe
/* Poll for new SDM control value */
select
{
case inuint_byref(c_sigma_delta, rx_word):
if(rx_word == DISABLE_SDM)
{
sw_pll_sdm_do_control_from_error(&sw_pll, -f_error);
dco_setting = sw_pll.sdm_state.current_ctrl_val;
f_error = 0;
running = 0;
}
}
break;
else
{
f_error = (int32_t)rx_word;
unsafe
{
sw_pll_sdm_do_control_from_error(&sw_pll, -f_error);
dco_setting = sw_pll.sdm_state.current_ctrl_val;
}
}
break;
/* Do nothing & fall-through. Above case polls only once per loop */
default:
break;
}
/* Do nothing & fall-through. Above case polls only once per loop */
default:
break;
}
/* Wait until the timer value has been reached
This implements a timing barrier and keeps
the loop rate constant. */
select
{
case tmr when timerafter(time_trigger) :> int _:
time_trigger += sdm_interval;
break;
}
/* Wait until the timer value has been reached
This implements a timing barrier and keeps
the loop rate constant. */
select
{
case tmr when timerafter(time_trigger) :> int _:
time_trigger += sdm_interval;
break;
}
unsafe {
sw_pll_do_sigma_delta(&sw_pll.sdm_state, this_tile, dco_setting);
}
} /* if running */
unsafe {
sw_pll_do_sigma_delta(&sw_pll.sdm_state, this_tile, dco_setting);
}
} /* if running */
} /* while(1) */
}
void restart_sigma_delta(chanend c_sigma_delta)
void restart_sigma_delta(chanend c_sigma_delta, unsigned selected_mclk_rate)
{
outuint(c_sigma_delta, DISABLE_SDM); /* Resets SDM */
outuint(c_sigma_delta, selected_mclk_rate);
}
#endif /* USE_SW_PLL */

33
lib_xua/src/core/main.xc
View File

@@ -314,8 +314,11 @@ void usb_audio_io(chanend ?c_aud_in,
#endif
#if (XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN)
, client interface pll_ref_if i_pll_ref
, port ?p_for_mclk_count_aud
#endif
#if USE_SW_PLL
, port p_for_mclk_count_aud
, chanend c_sw_pll
#endif /* USE_SW_PLL */
#endif /* (XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) */
)
{
#if (MIXER)
@@ -405,8 +408,9 @@ void usb_audio_io(chanend ?c_aud_in,
c_dig_rx,
c_clk_ctl,
c_clk_int,
c_mclk_change,
p_for_mclk_count_aud,
c_mclk_change);
c_sw_pll);
}
#endif
@@ -483,7 +487,7 @@ int main()
#endif
#endif
#if ((XUA_SYNCMODE == XUA_SYNCMODE_SYNC || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && !USE_SW_PLL)
#if (((XUA_SYNCMODE == XUA_SYNCMODE_SYNC && !USE_SW_PLL) || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) )
interface pll_ref_if i_pll_ref;
#endif
@@ -511,7 +515,7 @@ int main()
{
USER_MAIN_CORES
#if ((XUA_SYNCMODE == XUA_SYNCMODE_SYNC || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && !USE_SW_PLL)
#if (((XUA_SYNCMODE == XUA_SYNCMODE_SYNC && !USE_SW_PLL) || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN))
on tile[PLL_REF_TILE]: PllRefPinTask(i_pll_ref, p_pll_ref);
#endif
on tile[XUD_TILE]:
@@ -524,10 +528,6 @@ int main()
DFUHandler(dfuInterface, null);
#endif
#if ((XUA_SYNCMODE == XUA_SYNCMODE_SYNC || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && USE_SW_PLL)
//XUA_SoftPll(tile[0], i_softPll, c_swpll_update);
#endif
/* Core USB task, buffering, USB etc */
{
#ifdef XUD_PRIORITY_HIGH
@@ -589,7 +589,7 @@ int main()
#if (!USE_SW_PLL)
, i_pll_ref
#else
, c_sw_pll
, c_sw_pll
#endif
#endif
);
@@ -605,8 +605,8 @@ int main()
#endif /* XUA_USB_EN */
}
#if (XUA_SYNCMODE == XUA_SYNCMODE_SYNC && !USE_SW_PLL)
// on tile[AUDIO_IO_TILE]: XUA_SoftPll(tile[0], i_softPll, c_swpll_update);
#if ((XUA_SYNCMODE == XUA_SYNCMODE_SYNC || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN) && USE_SW_PLL)
on tile[AUDIO_IO_TILE]: sw_pll_task(c_sw_pll);
#endif
on tile[AUDIO_IO_TILE]:
@@ -625,16 +625,13 @@ int main()
, dfuInterface
#endif
#if (XUA_NUM_PDM_MICS > 0)
#if (PDM_TILE == AUDIO_IO_TILE)
, c_ds_output
#endif
, c_pdm_pcm
#endif
#if (XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN)
#if ((XUA_SYNCMODE == XUA_SYNCMODE_SYNC && !USE_SW_PLL) || XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN)
, i_pll_ref
#endif
#if (XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN)
#if (USE_SW_PLL && (XUA_SPDIF_RX_EN || XUA_ADAT_RX_EN))
, p_for_mclk_count_audio
, c_sw_pll
#endif
);
}