forked from PAWPAW-Mirror/lib_xua
@@ -58,27 +58,16 @@ static unsigned samplesIn[2][MAX(NUM_USB_CHAN_IN, IN_CHAN_COUNT)];
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#endif
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static int inDownsamplingCounter = 0;
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static int outDownsamplingCounter = 0;
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#if (I2S_DOWNSAMPLE_FACTOR_IN > 1) || (I2S_DOWNSAMPLE_FACTOR_OUT > 1)
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#if (I2S_DOWNSAMPLE_FACTOR_IN > 1)
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#include "src.h"
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static union ds3Data
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{
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long long doubleWordAlignmentEnsured;
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/* delay lines = [Number of I2S channels][Number of samples/phases][Taps per phase] */
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#if (I2S_DOWNSAMPLE_FACTOR_IN > 1)
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/* [Number of I2S channels][Number of samples/phases][Taps per phase] */
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int32_t inputDelayLine[I2S_DOWNSAMPLE_CHANS_IN][I2S_DOWNSAMPLE_FACTOR_IN][24];
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#endif // (I2S_DOWNSAMPLE_FACTOR_IN > 1)
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#if (I2S_DOWNSAMPLE_FACTOR_OUT > 1)
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int32_t outputDelayLine[I2S_DOWNSAMPLE_CHANS_OUT][I2S_DOWNSAMPLE_FACTOR_OUT][24];
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#endif // (I2S_DOWNSAMPLE_FACTOR_OUT > 1)
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} ds3Data;
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#if (I2S_DOWNSAMPLE_FACTOR_IN > 1)
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static int64_t inputDs3Sum[I2S_DOWNSAMPLE_CHANS_IN];
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#endif // (I2S_DOWNSAMPLE_FACTOR_IN > 1)
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#if (I2S_DOWNSAMPLE_FACTOR_OUT > 1)
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static int64_t outputDs3Sum[I2S_DOWNSAMPLE_CHANS_OUT];
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#endif // (I2S_DOWNSAMPLE_FACTOR_OUT > 1)
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#endif // (I2S_DOWNSAMPLE_FACTOR_IN > 1) || (I2S_DOWNSAMPLE_FACTOR_OUT > 1)
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#if (DSD_CHANS_DAC != 0)
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extern buffered out port:32 p_dsd_dac[DSD_CHANS_DAC];
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@@ -734,22 +723,20 @@ unsigned static deliver(chanend c_out, chanend ?c_spd_out,
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#pragma xta endpoint "i2s_output_l"
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#if (I2S_CHANS_DAC != 0) && (NUM_USB_CHAN_OUT != 0)
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if ((I2S_DOWNSAMPLE_FACTOR_OUT - 1) == outDownsamplingCounter)
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{
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index = 0;
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index = 0;
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#pragma loop unroll
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/* Output "even" channel to DAC (i.e. left) */
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for(int i = 0; i < I2S_CHANS_DAC; i+=I2S_CHANS_PER_FRAME)
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{
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p_i2s_dac[index++] <: bitrev(samplesOut[frameCount +i]);
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}
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/* Output "even" channel to DAC (i.e. left) */
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for(int i = 0; i < I2S_CHANS_DAC; i+=I2S_CHANS_PER_FRAME)
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{
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p_i2s_dac[index++] <: bitrev(samplesOut[frameCount +i]);
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}
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#endif
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#ifndef CODEC_MASTER
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/* Clock out the LR Clock, the DAC data and Clock in the next sample into ADC */
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doI2SClocks(divide);
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/* Clock out the LR Clock, the DAC data and Clock in the next sample into ADC */
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doI2SClocks(divide);
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#endif
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}
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#ifdef ADAT_TX
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TransferAdatTxSamples(c_adat_out, samplesOut, adatSmuxMode, 1);
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#endif
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@@ -870,24 +857,19 @@ unsigned static deliver(chanend c_out, chanend ?c_spd_out,
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index = 0;
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#pragma xta endpoint "i2s_output_r"
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#if (I2S_CHANS_DAC != 0) && (NUM_USB_CHAN_OUT != 0)
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if ((I2S_DOWNSAMPLE_FACTOR_OUT - 1) == outDownsamplingCounter)
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{
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/* Output "odd" channel to DAC (i.e. right) */
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/* Output "odd" channel to DAC (i.e. right) */
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#pragma loop unroll
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for(int i = 1; i < I2S_CHANS_DAC; i+=I2S_CHANS_PER_FRAME)
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{
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p_i2s_dac[index++] <: bitrev(samplesOut[frameCount + i]);
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}
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for(int i = 1; i < I2S_CHANS_DAC; i+=I2S_CHANS_PER_FRAME)
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{
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p_i2s_dac[index++] <: bitrev(samplesOut[frameCount + i]);
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}
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#endif
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#ifndef CODEC_MASTER
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doI2SClocks(divide);
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doI2SClocks(divide);
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#endif
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}
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else
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{
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++outDownsamplingCounter;
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}
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} // !dsdMode
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#if (DSD_CHANS_DAC != 0) && (NUM_USB_CHAN_OUT > 0)
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@@ -134,19 +134,6 @@
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#endif
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#endif
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/**
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* @brief Output I2S (host to device) channels can be downsampled by a factor of 3.
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*
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* Default: 1 i.e. downsampling is disabled.
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*/
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#ifndef I2S_DOWNSAMPLE_FACTOR_OUT
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#define I2S_DOWNSAMPLE_FACTOR_OUT (1)
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#else
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#if (I2S_DOWNSAMPLE_FACTOR_OUT != 3) && (I2S_DOWNSAMPLE_FACTOR_OUT != 1)
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#error Unsupported I2S output downsampling configuration
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#endif
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#endif
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/**
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* @brief Only downsample one channel per input I2S frame.
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*
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@@ -170,13 +157,6 @@
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#define I2S_DOWNSAMPLE_CHANS_IN I2S_CHANS_ADC
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#endif
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/**
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* @brief Number of output (host to device) I2S channels to downsample.
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*
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* Default: The number of I2S output channels.
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*/
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#define I2S_DOWNSAMPLE_CHANS_OUT I2S_CHANS_ADC
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/**
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* @brief Max supported sample frequency for device (Hz). Default: 192000
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*/
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