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PDM hw resource dec moved to main

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xross
2018-02-27 12:40:33 +00:00
parent 72f7a1d153
commit 04b08c9213
2 changed files with 21 additions and 9 deletions
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22
lib_xua/src/core/main.xc
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@@ -185,21 +185,33 @@ on tile[SPDIF_TX_TILE] : clock clk_mst_spd = CLKBLK_SPDIF_TX;
on tile[XUD_TILE] : clock clk_spd_rx = CLKBLK_SPDIF_RX;
#endif
#if (NUM_PDM_MICS > 0)
in port p_pdm_clk = PORT_PDM_CLK;
in buffered port:32 p_pdm_mics = PORT_PDM_DATA;
#if (PDM_TILE != AUDIO_IO_TILE)
/* If Mics and I2S are on the same tile we'll share an MCLK port */
in port p_pdm_mclk = PORT_PDM_MCLK;
#endif
#endif
#if(XUD_SERIES_SUPPORT == XUD_L_SERIES) && defined(ADAT_RX)
/* Cannot use default clock (CLKBLK_REF) for ADAT RX since it is tied to the
60MHz USB clock on G/L series parts. */
on tile[XUD_TILE] : clock clk_adat_rx = CLKBLK_ADAT_RX;
#endif
on tile[AUDIO_IO_TILE] : clock clk_audio_mclk = CLKBLK_MCLK; /* Master clock */
on tile[AUDIO_IO_TILE] : clock clk_audio_mclk = CLKBLK_MCLK; /* Master clock */
#if(AUDIO_IO_TILE != XUD_TILE) && !defined(NO_USB)
on tile[XUD_TILE] : clock clk_audio_mclk2 = CLKBLK_MCLK; /* Master clock */
on tile[XUD_TILE] : in port p_mclk_in2 = PORT_MCLK_IN2;
/* Separate clock/port for USB feedback calculation */
on tile[XUD_TILE] : clock clk_audio_mclk_usb = CLKBLK_MCLK; /* Master clock */
on tile[XUD_TILE] : in port p_mclk_in_usb = PORT_MCLK_IN_USB;
#endif
on tile[AUDIO_IO_TILE] : clock clk_audio_bclk = CLKBLK_I2S_BIT; /* Bit clock */
on tile[AUDIO_IO_TILE] : clock clk_audio_bclk = CLKBLK_I2S_BIT; /* Bit clock */
/* L/G Series needs a port to use for USB reset */

8
lib_xua/src/core/pdm_mics/pdm_mic.xc
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@@ -21,13 +21,13 @@
#define MAX_DECIMATION_FACTOR (96000/(MIN_FREQ/AUD_TO_MICS_RATIO))
/* Hardware resources */
/* TODO these should be in main.xc with the rest of the resources */
in port p_pdm_clk = PORT_PDM_CLK;
extern in port p_pdm_clk;
extern in buffered port:32 p_pdm_mics;
in buffered port:32 p_pdm_mics = PORT_PDM_DATA;
#if (PDM_TILE != AUDIO_IO_TILE)
/* If Mics and I2S are on the same tile we'll share an MCLK port */
in port p_pdm_mclk = PORT_PDM_MCLK;
extern in port p_pdm_mclk;
#else
extern unsafe port p_mclk_in;
#endif