forked from PAWPAW-Mirror/lib_xua
Ross Owen
GitHub
@@ -1244,10 +1244,6 @@ enum USBEndpointNumber_Out
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#define MAX_VOL (0x20000000)
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#if defined(SU1_ADC_ENABLE) && (SU1_ADC_ENABLE == 0)
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#undef SU1_ADC_ENABLE
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#endif
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#if defined(LEVEL_METER_LEDS) && !defined(LEVEL_UPDATE_RATE)
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#define LEVEL_UPDATE_RATE 400000
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#endif
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@@ -72,13 +72,8 @@
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//int ksp_enter, ksp_exit, r11_store;
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#if defined(__XS2A__) || defined(__XS3A__)
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#define ISSUE_MODE_SINGLE ".issue_mode single\n"
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#define ISSUE_MODE_DUAL ".issue_mode dual\n"
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#else
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#define ISSUE_MODE_SINGLE
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#define ISSUE_MODE_DUAL
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#endif
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#define do_interrupt_handler(f,args) \
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asm(ISSUE_MODE_SINGLE\
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@@ -196,14 +196,6 @@ in port p_pdm_mclk = PORT_PDM_MCLK;
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#endif
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#endif
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#if (defined(__XS2A__) && (ADAT_RX))
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/* Cannot use default clock (CLKBLK_REF) for ADAT RX since it is tied to the
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60MHz USB clock on XS2 processors. */
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on tile[XUD_TILE] : clock clk_adat_rx = CLKBLK_ADAT_RX;
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#endif
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on tile[AUDIO_IO_TILE] : clock clk_audio_mclk = CLKBLK_MCLK; /* Master clock */
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#if(AUDIO_IO_TILE != XUD_TILE) && XUA_USB_EN
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@@ -214,15 +206,6 @@ on tile[XUD_TILE] : in port p_mclk_in_usb = PORT_MCLK_IN_USB;
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on tile[AUDIO_IO_TILE] : clock clk_audio_bclk = CLKBLK_I2S_BIT; /* Bit clock */
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/* L/G Series needs a port to use for USB reset */
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#if ((defined(__XS2A__) || defined (__XS3A__)) && defined(PORT_USB_RESET))
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/* This define is checked since it could be on a shift reg or similar */
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on tile[XUD_TILE] : out port p_usb_rst = PORT_USB_RESET;
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#else
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#define p_usb_rst null
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#endif
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#ifdef IAP
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/* I2C ports - in a struct for use with module_i2c_shared & module_i2c_simple/module_i2c_single_port */
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#ifdef PORT_I2C
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@@ -443,7 +426,7 @@ void SpdifTxWrapper(chanend c_spdif_tx)
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}
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#endif
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void usb_audio_io(chanend ?c_aud_in, chanend ?c_adc,
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void usb_audio_io(chanend ?c_aud_in,
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#if (XUA_SPDIF_TX_EN) && (SPDIF_TX_TILE != AUDIO_IO_TILE)
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chanend c_spdif_tx,
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#endif
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@@ -571,11 +554,6 @@ int main()
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chan c_ea_data;
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#endif
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#endif
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#ifdef SU1_ADC_ENABLE
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chan c_adc;
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#else
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#define c_adc null
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#endif
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#ifdef MIXER
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chan c_mix_ctl;
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@@ -659,7 +637,7 @@ int main()
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on tile[AUDIO_IO_TILE]:
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{
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usb_audio_io(c_mix_out, c_adc
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usb_audio_io(c_mix_out
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#if (XUA_SPDIF_TX_EN) && (SPDIF_TX_TILE != AUDIO_IO_TILE)
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, c_spdif_tx
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#endif
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@@ -725,11 +703,6 @@ int main()
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{
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set_thread_fast_mode_on();
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#if defined(__XS2A__)
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/* Can't use REF clock as this is usb clock */
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set_port_clock(p_adat_rx, clk_adat_rx);
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start_clock(clk_adat_rx);
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#endif
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while (1)
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{
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adatReceiver48000(p_adat_rx, c_adat_rx);
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@@ -765,11 +738,6 @@ int main()
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#endif /*MIC_PROCESSING_USE_INTERFACE*/
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#endif /*XUA_NUM_PDM_MICS > 0*/
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#endif /*PDM_RECORD*/
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#ifdef SU1_ADC_ENABLE
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xs1_su_adc_service(c_adc);
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#endif
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}
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return 0;
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@@ -1,13 +1,9 @@
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// Copyright 2018-2021 XMOS LIMITED.
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// This Software is subject to the terms of the XMOS Public Licence: Version 1.
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//#include "devicedefines.h"
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#define MAX_MIX_COUNT 8
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#define MIX_INPUTS 18
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#if defined(__XS2A__) || defined(__XS3A__)
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#define DOMIX_TOP(i) \
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.cc_top doMix##i.function,doMix##i; \
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.align 4 ;\
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@@ -50,52 +46,6 @@ doMix##i##: ;\
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.size doMix##i, .-doMix##i; \
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.cc_bottom doMix##i##.function;
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#else
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#define DOMIX_TOP(i) \
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.cc_top doMix##i.function,doMix##i; \
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.align 4 ;\
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.globl doMix##i ;\
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.type doMix##i, @function ;\
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.globl doMix##i##.nstackwords ;\
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.globl doMix##i##.maxthreads ; \
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.globl doMix##i##.maxtimers ; \
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.globl doMix##i##.maxchanends ; \
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.globl doMix##i##.maxsync ;\
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.linkset doMix##i##.locnoside, 1; \
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.linkset doMix##i##.locnochandec, 1;\
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.linkset doMix##i##.nstackwords, 0 ;\
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.linkset doMix##i##.maxchanends, 0 ;\
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.linkset doMix##i##.maxtimers, 0 ;\
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.linkset doMix##i##.maxthreads, 1; \
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doMix##i##: ;\
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set cp, r0; \
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set dp, r1; \
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lsub r0, r1, r0, r0, r0;\
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.label_##i##:
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#define DOMIX_BOT(i) \
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ldap r11, _dp; \
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set dp, r11;\
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ldap r11, _cp;\
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set cp, r11;\
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\
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mov r0, r1;\
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ldc r2, 0x19;\
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sext r0, r2;\
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eq r0, r0, r1;\
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bf r0, .L20; \
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\
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shl r0, r1, 0x7;\
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retsp 0x0;\
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\
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\
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.size doMix##i, .-doMix##i; \
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.cc_bottom doMix##i##.function;
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#endif
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#define N MIX_INPUTS
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#define BODY(i) \
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ldw r2,cp[i]; \
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@@ -115,8 +65,6 @@ doMix##i##: ;\
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retsp 0x0; \
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#if(MAX_MIX_COUNT > 0)
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DOMIX_TOP(0)
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#include "repeat.h"
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@@ -62,37 +62,12 @@ unsigned int divide, unsigned curSamFreq)
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}
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#endif
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#if defined(__XS2A__) || defined(__XS3A__)
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unsafe
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{
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/* Clock bitclock clock block from master clock pin (divided) */
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configure_clock_src_divide(clk_audio_bclk, (port) p_mclk_in, (divide/2));
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configure_port_clock_output(p_bclk, clk_audio_bclk);
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}
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#else
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#error XS1 no longer supported in audio core
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/* For a divide of one (i.e. bitclock == master-clock) BClk is set to clock_output mode.
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* In this mode it outputs an edge clock on every tick of itsassociated clock_block.
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*
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* For all other divides, BClk is clocked by the master clock and data
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* will be output to p_bclk to generate the bit clock.
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*/
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if (divide == 1) /* e.g. 176.4KHz from 11.2896 */
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{
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configure_port_clock_output(p_bclk, clk_audio_mclk);
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/* Generate bit clock block straight from mclk */
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configure_clock_src(clk_audio_bclk, p_mclk_in);
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}
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else
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{
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/* bit clock port from master clock clock-clock block */
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configure_out_port_no_ready(p_bclk, clk_audio_mclk, 0);
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/* Generate bit clock block from pin */
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configure_clock_src(clk_audio_bclk, p_bclk);
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}
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#endif
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if(!isnull(p_lrclk))
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{
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@@ -38,8 +38,6 @@ void device_reboot(void)
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/* Disconnect from bus */
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unsigned data[] = {4};
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write_periph_32(usb_tile, XS2_SU_PERIPH_USB_ID, XS1_GLX_PER_UIFM_FUNC_CONTROL_NUM, 1, data);
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#elif defined(__XS3A__)
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#warning Assuming that tile reset also resets USB in XS3 architectures
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#endif
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tileArrayLength = sizeof(tile)/sizeof(tileref);
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@@ -11,11 +11,12 @@
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#include "flash_interface.h"
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#include "dfu_interface.h"
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#if defined(__XS3A__)
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#define FLAG_ADDRESS 0xfffcc
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#elif defined(__XS2A__)
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#if defined(__XS2A__)
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/* Note range 0x7FFC8 - 0x7FFFF guarenteed to be untouched by tools */
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#define FLAG_ADDRESS 0x7ffcc
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#else
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/* Note range 0xFFFC8 - 0xFFFFF guarenteed to be untouched by tools */
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#define FLAG_ADDRESS 0xfffcc
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#endif
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/* Store Flag to fixed address */
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