forked from PAWPAW-Mirror/lib_xua
Start simplifiction of appnote code
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@@ -5,9 +5,10 @@ lib_xua Change Log
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-----
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* ADDED: Application note AN00246
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* RESOLVED: Runtime exeption issues when incorrect feedback calculated (introduced in sc_xud
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6.13)
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* RESOLVED: Output sample counter reset on stream start. Caused playback issues on some Linux based hosts
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* RESOLVED: Runtime exception issues when incorrect feedback calculated
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(introduced in sc_xud 6.13)
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* RESOLVED: Output sample counter reset on stream start. Caused playback
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issues on some Linux based hosts
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0.1.1
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-----
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@@ -22,23 +22,23 @@ buffered in port:32 p_i2s_adc[] = {PORT_I2S_ADC0}; /* I2S Data-line(s) */
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buffered out port:32 p_lrclk = PORT_I2S_LRCLK; /* I2S Bit-clock */
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buffered out port:32 p_bclk = PORT_I2S_BCLK; /* I2S L/R-clock */
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/* Note, declared unsafe as sometimes we want to share this port
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e.g. PDM mics and I2S use same master clock IO */
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port p_mclk_in_ = PORT_MCLK_IN;
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/* Master clock for the audio IO tile */
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in port p_mclk_in = PORT_MCLK_IN;
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unsafe
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{
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/* TODO simplify this */
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unsafe port p_mclk_in; /* Audio master clock input */
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}
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//unsafe
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//{
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// /* TODO simplify this */
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// unsafe port p_mclk_in; /* Audio master clock input */
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//}
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/* Resources for USB feedback */
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in port p_for_mclk_count = PORT_MCLK_COUNT; /* Extra port for counting master clock ticks */
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in port p_mclk_in2 = PORT_MCLK_IN2;
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in port p_mclk_in_usb = PORT_MCLK_IN_USB; /* Extra master clock input for the USB tile */
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/* Clock-block declarations */
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clock clk_audio_bclk = on tile[0]: XS1_CLKBLK_4; /* Bit clock */
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clock clk_audio_mclk = on tile[0]: XS1_CLKBLK_5; /* Master clock */
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clock clk_audio_mclk2 = on tile[1]: XS1_CLKBLK_1; /* Master clock */
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clock clk_audio_mclk_usb = on tile[1]: XS1_CLKBLK_1; /* Master clock for USB tile */
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/* Endpoint type tables - informs XUD what the transfer types for each Endpoint in use and also
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* if the endpoint wishes to be informed of USB bus resets */
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@@ -54,7 +54,7 @@ int main()
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/* Channel for communicating SOF notifications from XUD to the Buffering cores */
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chan c_sof;
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/* Channel for audio data between buffering cores and audio IO core */
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/* Channel for audio data between buffering cores and AudioHub/IO core */
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chan c_aud;
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/* Channel for communicating control messages from EP0 to the rest of the device (via the buffering cores */
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@@ -66,7 +66,7 @@ int main()
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on tile[1]: XUD_Main(c_ep_out, 2, c_ep_in, 2,
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c_sof, epTypeTableOut, epTypeTableIn,
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null, null, -1 ,
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XUD_SPEED_HS, XUD_PWR_BUS);
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XUD_SPEED_HS, XUD_PWR_SELF);
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/* Endpoint 0 core from lib_xua */
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/* Note, since we are not using many features we pass in null for quite a few params.. */
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@@ -75,20 +75,22 @@ int main()
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/* Buffering cores - handles audio data to/from EP's and gives/gets data to/from the audio I/O core */
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/* Note, this spawns two cores */
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on tile[1]: {
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set_clock_src(clk_audio_mclk2, p_mclk_in2);
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set_port_clock(p_for_mclk_count, clk_audio_mclk2);
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start_clock(clk_audio_mclk2);
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/* Connect master-clock clock-block to clock-block pin */
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set_clock_src(clk_audio_mclk_usb, p_mclk_in_usb); /* Clock clock-block from mclk pin */
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set_port_clock(p_for_mclk_count, clk_audio_mclk_usb); /* Clock the "count" port from the clock block */
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start_clock(clk_audio_mclk_usb); /* Set the clock off running */
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XUA_Buffer(c_ep_out[1], c_ep_in[1], c_sof, c_aud_ctl, p_for_mclk_count, c_aud);
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}
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/* IOHub core does most of the audio IO i.e. I2S (also serves as a hub for all audio) */
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/* AudioHub/IO core does most of the audio IO i.e. I2S (also serves as a hub for all audio) */
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on tile[0]: {
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unsafe
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{
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p_mclk_in = p_mclk_in_;
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}
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//unsafe
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//{
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// p_mclk_in = p_mclk_in_;
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// }
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XUA_AudioHub(c_aud);
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}
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}
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@@ -40,9 +40,10 @@
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</Tile>
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<Tile Number="1" Reference="tile[1]">
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<!-- USB intended to run on this tile -->
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<!-- Audio Ports -->
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<!-- Ports for USB feedback calculation -->
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<Port Location="XS1_PORT_16B" Name="PORT_MCLK_COUNT"/>
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<Port Location="XS1_PORT_1L" Name="PORT_MCLK_IN2"/>
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<Port Location="XS1_PORT_1L" Name="PORT_MCLK_IN_USB"/>
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<!-- Audio Ports -->
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<Port Location="XS1_PORT_1M" Name="PORT_MIDI_IN"/>
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<Port Location="XS1_PORT_1N" Name="PORT_MIDI_OUT"/>
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<Port Location="XS1_PORT_1O" Name="PORT_ADAT_IN"/>--> <!-- P: COAX O: OPT -->
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@@ -100,7 +100,7 @@ extern buffered out port:32 p_bclk;
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unsigned dsdMode = DSD_MODE_OFF;
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/* Master clock input */
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extern unsafe port p_mclk_in;
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extern in port p_mclk_in;
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extern in port p_mclk_in2;
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#if (XUA_SPDIF_TX_EN)
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@@ -492,7 +492,7 @@ __builtin_unreachable();
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speedRem &= 0xffff;
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/* This patches up the case where the FB is well off, leading to totalSampsToWrite to also be off */
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/* This can be startup case, back mclk input etc */
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/* This can be startup case, bad mclk input etc */
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if (totalSampsToWrite < 0 || totalSampsToWrite * g_curSubSlot_In * g_numUsbChan_In > g_maxPacketSize)
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{
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totalSampsToWrite = 0;
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@@ -834,6 +834,7 @@ void XUA_Buffer_Decouple(chanend c_mix_out
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/* Reset OUT buffer state */
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SET_SHARED_GLOBAL(g_aud_from_host_rdptr, aud_from_host_fifo_start);
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SET_SHARED_GLOBAL(g_aud_from_host_wrptr, aud_from_host_fifo_start);
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SET_SHARED_GLOBAL(aud_data_remaining_to_device, 0);
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/* NOTE, this is potentially usefull for UAC1 */
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unpackState = 0;
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@@ -7,7 +7,7 @@
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extern unsafe port p_mclk_in;
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extern in port p_mclk_in;
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extern clock clk_audio_mclk;
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extern clock clk_audio_bclk;
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