Start simplifiction of appnote code

This commit is contained in:
xross
2018-02-21 10:57:05 +00:00
6 changed files with 33 additions and 28 deletions

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@@ -5,9 +5,10 @@ lib_xua Change Log
----- -----
* ADDED: Application note AN00246 * ADDED: Application note AN00246
* RESOLVED: Runtime exeption issues when incorrect feedback calculated (introduced in sc_xud * RESOLVED: Runtime exception issues when incorrect feedback calculated
6.13) (introduced in sc_xud 6.13)
* RESOLVED: Output sample counter reset on stream start. Caused playback issues on some Linux based hosts * RESOLVED: Output sample counter reset on stream start. Caused playback
issues on some Linux based hosts
0.1.1 0.1.1
----- -----

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@@ -22,23 +22,23 @@ buffered in port:32 p_i2s_adc[] = {PORT_I2S_ADC0}; /* I2S Data-line(s) */
buffered out port:32 p_lrclk = PORT_I2S_LRCLK; /* I2S Bit-clock */ buffered out port:32 p_lrclk = PORT_I2S_LRCLK; /* I2S Bit-clock */
buffered out port:32 p_bclk = PORT_I2S_BCLK; /* I2S L/R-clock */ buffered out port:32 p_bclk = PORT_I2S_BCLK; /* I2S L/R-clock */
/* Note, declared unsafe as sometimes we want to share this port /* Master clock for the audio IO tile */
e.g. PDM mics and I2S use same master clock IO */ in port p_mclk_in = PORT_MCLK_IN;
port p_mclk_in_ = PORT_MCLK_IN;
unsafe //unsafe
{ //{
/* TODO simplify this */ // /* TODO simplify this */
unsafe port p_mclk_in; /* Audio master clock input */ // unsafe port p_mclk_in; /* Audio master clock input */
} //}
/* Resources for USB feedback */
in port p_for_mclk_count = PORT_MCLK_COUNT; /* Extra port for counting master clock ticks */ in port p_for_mclk_count = PORT_MCLK_COUNT; /* Extra port for counting master clock ticks */
in port p_mclk_in2 = PORT_MCLK_IN2; in port p_mclk_in_usb = PORT_MCLK_IN_USB; /* Extra master clock input for the USB tile */
/* Clock-block declarations */ /* Clock-block declarations */
clock clk_audio_bclk = on tile[0]: XS1_CLKBLK_4; /* Bit clock */ clock clk_audio_bclk = on tile[0]: XS1_CLKBLK_4; /* Bit clock */
clock clk_audio_mclk = on tile[0]: XS1_CLKBLK_5; /* Master clock */ clock clk_audio_mclk = on tile[0]: XS1_CLKBLK_5; /* Master clock */
clock clk_audio_mclk2 = on tile[1]: XS1_CLKBLK_1; /* Master clock */ clock clk_audio_mclk_usb = on tile[1]: XS1_CLKBLK_1; /* Master clock for USB tile */
/* Endpoint type tables - informs XUD what the transfer types for each Endpoint in use and also /* Endpoint type tables - informs XUD what the transfer types for each Endpoint in use and also
* if the endpoint wishes to be informed of USB bus resets */ * if the endpoint wishes to be informed of USB bus resets */
@@ -54,7 +54,7 @@ int main()
/* Channel for communicating SOF notifications from XUD to the Buffering cores */ /* Channel for communicating SOF notifications from XUD to the Buffering cores */
chan c_sof; chan c_sof;
/* Channel for audio data between buffering cores and audio IO core */ /* Channel for audio data between buffering cores and AudioHub/IO core */
chan c_aud; chan c_aud;
/* Channel for communicating control messages from EP0 to the rest of the device (via the buffering cores */ /* Channel for communicating control messages from EP0 to the rest of the device (via the buffering cores */
@@ -66,7 +66,7 @@ int main()
on tile[1]: XUD_Main(c_ep_out, 2, c_ep_in, 2, on tile[1]: XUD_Main(c_ep_out, 2, c_ep_in, 2,
c_sof, epTypeTableOut, epTypeTableIn, c_sof, epTypeTableOut, epTypeTableIn,
null, null, -1 , null, null, -1 ,
XUD_SPEED_HS, XUD_PWR_BUS); XUD_SPEED_HS, XUD_PWR_SELF);
/* Endpoint 0 core from lib_xua */ /* Endpoint 0 core from lib_xua */
/* Note, since we are not using many features we pass in null for quite a few params.. */ /* Note, since we are not using many features we pass in null for quite a few params.. */
@@ -75,20 +75,22 @@ int main()
/* Buffering cores - handles audio data to/from EP's and gives/gets data to/from the audio I/O core */ /* Buffering cores - handles audio data to/from EP's and gives/gets data to/from the audio I/O core */
/* Note, this spawns two cores */ /* Note, this spawns two cores */
on tile[1]: { on tile[1]: {
set_clock_src(clk_audio_mclk2, p_mclk_in2);
set_port_clock(p_for_mclk_count, clk_audio_mclk2); /* Connect master-clock clock-block to clock-block pin */
start_clock(clk_audio_mclk2); set_clock_src(clk_audio_mclk_usb, p_mclk_in_usb); /* Clock clock-block from mclk pin */
set_port_clock(p_for_mclk_count, clk_audio_mclk_usb); /* Clock the "count" port from the clock block */
start_clock(clk_audio_mclk_usb); /* Set the clock off running */
XUA_Buffer(c_ep_out[1], c_ep_in[1], c_sof, c_aud_ctl, p_for_mclk_count, c_aud); XUA_Buffer(c_ep_out[1], c_ep_in[1], c_sof, c_aud_ctl, p_for_mclk_count, c_aud);
} }
/* IOHub core does most of the audio IO i.e. I2S (also serves as a hub for all audio) */ /* AudioHub/IO core does most of the audio IO i.e. I2S (also serves as a hub for all audio) */
on tile[0]: { on tile[0]: {
unsafe //unsafe
{ //{
p_mclk_in = p_mclk_in_; // p_mclk_in = p_mclk_in_;
} // }
XUA_AudioHub(c_aud); XUA_AudioHub(c_aud);
} }
} }

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@@ -40,9 +40,10 @@
</Tile> </Tile>
<Tile Number="1" Reference="tile[1]"> <Tile Number="1" Reference="tile[1]">
<!-- USB intended to run on this tile --> <!-- USB intended to run on this tile -->
<!-- Audio Ports --> <!-- Ports for USB feedback calculation -->
<Port Location="XS1_PORT_16B" Name="PORT_MCLK_COUNT"/> <Port Location="XS1_PORT_16B" Name="PORT_MCLK_COUNT"/>
<Port Location="XS1_PORT_1L" Name="PORT_MCLK_IN2"/> <Port Location="XS1_PORT_1L" Name="PORT_MCLK_IN_USB"/>
<!-- Audio Ports -->
<Port Location="XS1_PORT_1M" Name="PORT_MIDI_IN"/> <Port Location="XS1_PORT_1M" Name="PORT_MIDI_IN"/>
<Port Location="XS1_PORT_1N" Name="PORT_MIDI_OUT"/> <Port Location="XS1_PORT_1N" Name="PORT_MIDI_OUT"/>
<Port Location="XS1_PORT_1O" Name="PORT_ADAT_IN"/>--> <!-- P: COAX O: OPT --> <Port Location="XS1_PORT_1O" Name="PORT_ADAT_IN"/>--> <!-- P: COAX O: OPT -->

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@@ -100,7 +100,7 @@ extern buffered out port:32 p_bclk;
unsigned dsdMode = DSD_MODE_OFF; unsigned dsdMode = DSD_MODE_OFF;
/* Master clock input */ /* Master clock input */
extern unsafe port p_mclk_in; extern in port p_mclk_in;
extern in port p_mclk_in2; extern in port p_mclk_in2;
#if (XUA_SPDIF_TX_EN) #if (XUA_SPDIF_TX_EN)

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@@ -492,7 +492,7 @@ __builtin_unreachable();
speedRem &= 0xffff; speedRem &= 0xffff;
/* This patches up the case where the FB is well off, leading to totalSampsToWrite to also be off */ /* This patches up the case where the FB is well off, leading to totalSampsToWrite to also be off */
/* This can be startup case, back mclk input etc */ /* This can be startup case, bad mclk input etc */
if (totalSampsToWrite < 0 || totalSampsToWrite * g_curSubSlot_In * g_numUsbChan_In > g_maxPacketSize) if (totalSampsToWrite < 0 || totalSampsToWrite * g_curSubSlot_In * g_numUsbChan_In > g_maxPacketSize)
{ {
totalSampsToWrite = 0; totalSampsToWrite = 0;
@@ -834,6 +834,7 @@ void XUA_Buffer_Decouple(chanend c_mix_out
/* Reset OUT buffer state */ /* Reset OUT buffer state */
SET_SHARED_GLOBAL(g_aud_from_host_rdptr, aud_from_host_fifo_start); SET_SHARED_GLOBAL(g_aud_from_host_rdptr, aud_from_host_fifo_start);
SET_SHARED_GLOBAL(g_aud_from_host_wrptr, aud_from_host_fifo_start); SET_SHARED_GLOBAL(g_aud_from_host_wrptr, aud_from_host_fifo_start);
SET_SHARED_GLOBAL(aud_data_remaining_to_device, 0);
/* NOTE, this is potentially usefull for UAC1 */ /* NOTE, this is potentially usefull for UAC1 */
unpackState = 0; unpackState = 0;

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@@ -7,7 +7,7 @@
extern unsafe port p_mclk_in; extern in port p_mclk_in;
extern clock clk_audio_mclk; extern clock clk_audio_mclk;
extern clock clk_audio_bclk; extern clock clk_audio_bclk;