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Initial modifications to extend support to variable bit width master

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This commit is contained in:
Ed Clarke
2019-04-30 18:09:23 +01:00
parent 8f9828ea2c
commit b032310302
2 changed files with 13 additions and 6 deletions
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7
lib_xua/src/core/audiohub/audiohub_initport.xc
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@@ -39,7 +39,7 @@ void InitPorts_master(unsigned divide, buffered _XUA_CLK_DIR port:32 p_lrclk, bu
#pragma xta endpoint "divide_1"
unsigned tmp;
p_lrclk <: 0 @ tmp;
tmp = partout_timestamped(p_lrclk, N_BITS_I2S, 0);
tmp += 100;
/* Since BCLK is free-running, setup outputs/inputs at a known point in the future */
@@ -47,16 +47,17 @@ void InitPorts_master(unsigned divide, buffered _XUA_CLK_DIR port:32 p_lrclk, bu
#pragma loop unroll
for(int i = 0; i < I2S_WIRES_DAC; i++)
{
p_i2s_dac[i] @ tmp <: 0;
partout_timed(p_i2s_dac[i], N_BITS_I2S, 0, tmp);
}
#endif
p_lrclk @ tmp <: 0x7FFFFFFF;
partout_timed(p_lrclk, N_BITS_I2S, 0x7FFFFFFF, tmp);
#if (I2S_CHANS_ADC != 0)
for(int i = 0; i < I2S_WIRES_ADC; i++)
{
asm("setpt res[%0], %1"::"r"(p_i2s_adc[i]),"r"(tmp-1));
set_port_shift_count(p_i2s_adc[i], N_BITS_I2S);
}
#endif
#endif /* (I2S_CHANS_ADC != 0 || I2S_CHANS_DAC != 0) */

12
lib_xua/src/core/audiohub/xua_audiohub.xc
View File

@@ -211,9 +211,10 @@ static inline int HandleSampleClock(int frameCount, buffered _XUA_CLK_DIR port:3
else
{
if(frameCount == 0)
p_lrclk <: 0x80000000;
partout(p_lrclk, N_BITS_I2S, 0x80000000);
else
p_lrclk <: 0x7fffffff;
partout(p_lrclk, N_BITS_I2S, 0x7fffffff);
}
return 0;
@@ -769,9 +770,14 @@ void XUA_AudioHub(chanend ?c_aud, clock ?clk_audio_mclk, clock ?clk_audio_bclk,
#if I2S_MODE_TDM
/* I2S has 32 bits per sample. *8 as 8 channels */
unsigned numBits = 256;
#if N_BITS_I2S != 32
#error TDM mode only supports 32 bclks per sample
#endif
#else
/* I2S has 32 bits per sample. *2 as 2 channels */
unsigned numBits = 64;
unsigned numBits = 2 * N_BITS_I2S;
#endif
#if (DSD_CHANS_DAC > 0)