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takstar_us
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feat/dummy
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@@ -197,6 +197,23 @@
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#define I2S_DOWNSAMPLE_CHANS_IN I2S_CHANS_ADC
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#define I2S_DOWNSAMPLE_CHANS_IN I2S_CHANS_ADC
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#endif
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#endif
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#ifndef XUA_I2S_DUMMY_SAMPS
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#define XUA_I2S_DUMMY_SAMPS (0)
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#endif
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/**
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* @brief Number of bits per channel for I2S/TDM. Supported values: 16/32-bit.
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*
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* Default: 32 bits
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*/
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#ifndef XUA_I2S_N_BITS
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#define XUA_I2S_N_BITS (32)
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#endif
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#if (XUA_I2S_N_BITS != 16) && (XUA_I2S_N_BITS != 32)
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#error Unsupported value for XUA_I2S_N_BITS (only values 16/32 supported)
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#endif
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/**
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/**
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* @brief Number of bits per channel for I2S/TDM. Supported values: 16/32-bit.
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* @brief Number of bits per channel for I2S/TDM. Supported values: 16/32-bit.
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*
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*
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@@ -80,6 +80,14 @@ unsigned dsdMode = DSD_MODE_OFF;
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#endif
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#endif
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#include "xua_audiohub_st.h"
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#include "xua_audiohub_st.h"
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static inline void PortOutput(buffered out port:32 p, int bits, int value)
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{
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if(bits == 32)
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p <: value;
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else
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partout(p, bits, value);
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}
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static inline int HandleSampleClock(int frameCount, buffered _XUA_CLK_DIR port:32 p_lrclk)
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static inline int HandleSampleClock(int frameCount, buffered _XUA_CLK_DIR port:32 p_lrclk)
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{
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{
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#if CODEC_MASTER
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#if CODEC_MASTER
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@@ -286,6 +294,19 @@ unsigned static AudioHub_MainLoop(chanend ?c_out, chanend ?c_spd_out
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else
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else
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#endif
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#endif
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{
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{
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#if XUA_I2S_DUMMY_SAMPS
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if(frameCount == 0)
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{
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for(int j = 0; j < XUA_I2S_DUMMY_SAMPS; j++)
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for(int i = 0; i < I2S_WIRES_DAC; i++)
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{
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PortOutput(p_i2s_dac[i], XUA_I2S_N_BITS, 0);
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}
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}
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#endif
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#if (I2S_CHANS_ADC != 0)
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#if (I2S_CHANS_ADC != 0)
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#if (AUD_TO_USB_RATIO > 1)
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#if (AUD_TO_USB_RATIO > 1)
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if (0 == audioToUsbRatioCounter)
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if (0 == audioToUsbRatioCounter)
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@@ -478,6 +499,25 @@ unsigned static AudioHub_MainLoop(chanend ?c_out, chanend ?c_spd_out
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}
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}
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#endif
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#endif
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#if XUA_I2S_DUMMY_SAMPS
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if(frameCount == 1)
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{
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int dummyBits;
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for(int j = 0; j < XUA_I2S_DUMMY_SAMPS; j++)
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{
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for(int i = 0; i < I2S_WIRES_ADC; i++)
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{
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asm volatile("in %0, res[%1]" : "=r"(dummyBits) : "r"(p_i2s_adc[i]));
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if(XUA_I2S_N_BITS)
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set_port_shift_count(p_i2s_adc[i], XUA_I2S_N_BITS);
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}
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asm volatile("in %0, res[%1]" : "=r"(dummyBits) : "r"(p_lrclk));
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if(XUA_I2S_N_BITS)
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set_port_shift_count(p_lrclk, XUA_I2S_N_BITS);
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}
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}
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#endif
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#if (I2S_CHANS_ADC != 0 || I2S_CHANS_DAC != 0)
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#if (I2S_CHANS_ADC != 0 || I2S_CHANS_DAC != 0)
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syncError += HandleSampleClock(frameCount, p_lrclk);
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syncError += HandleSampleClock(frameCount, p_lrclk);
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#endif
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#endif
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@@ -1,6 +1,7 @@
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// Copyright 2016-2023 XMOS LIMITED.
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// Copyright 2016-2023 XMOS LIMITED.
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// This Software is subject to the terms of the XMOS Public Licence: Version 1.
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// This Software is subject to the terms of the XMOS Public Licence: Version 1.
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#ifdef SIMULATION
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#ifdef SIMULATION
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#include "xua.h"
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#include <platform.h>
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#include <platform.h>
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#include <print.h>
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#include <print.h>
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@@ -45,7 +46,7 @@ void slave_mode_clk_setup(const unsigned samFreq, const unsigned chans_per_frame
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const unsigned mclk_freq = 24576000;
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const unsigned mclk_freq = 24576000;
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const unsigned mclk_bclk_ratio = mclk_freq / (chans_per_frame * samFreq * data_bits);
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const unsigned mclk_bclk_ratio = mclk_freq / (chans_per_frame * samFreq * data_bits);
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const unsigned bclk_lrclk_ratio = (chans_per_frame * data_bits); // 48.828Hz LRCLK
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const unsigned bclk_lrclk_ratio = (chans_per_frame * data_bits + (data_bits * XUA_I2S_DUMMY_SAMPS)); // 48.828Hz LRCLK
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//bclk
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//bclk
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configure_clock_src_divide(clk_audio_bclk_gen, p_mclk_gen, mclk_bclk_ratio/2);
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configure_clock_src_divide(clk_audio_bclk_gen, p_mclk_gen, mclk_bclk_ratio/2);
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