42 Commits

Author SHA1 Message Date
Ross Owen
3a2926d1d8 Set default XUA_I2S_DUMMY_SAMPS value to 0 2023-06-12 18:07:10 +01:00
Ross Owen
85fd297336 Merge remote-tracking branch 'upstream' into feat/dummy_samps 2023-06-12 16:22:57 +01:00
Ross Owen
c92a640439 Added support for I2S/TDM “dummy samples” via XUA_I2S_DUMMY_SAMPS 2023-06-12 16:22:35 +01:00
Ross Owen
355df6d6b8 Fixed doc build 2023-06-07 15:24:29 +01:00
Ross Owen
0bff3dc5a8 Removed documentation for XUA_I2S_N_BITS=24 2023-06-07 12:32:07 +01:00
Ross Owen
9abd3b33f3 Bump lib_spdif dependency requirement 2023-06-07 12:17:40 +01:00
Ross Owen
0932ca0ccc Documentation updates relating to TDM/I2S 2023-06-07 11:53:42 +01:00
Ross Owen
f1df805b17 Added checks on XUA_I2S_N_BITS value 2023-06-07 10:24:40 +01:00
Ross Owen
867fb3f228 Use XUA_I2S_N_BITS when deciding whether or not to delay falling edge of bit clock when CODEC_MASTER=1 2023-06-06 20:20:15 +01:00
Ross Owen
9cbdf6374e Copyright date update 2023-06-06 19:34:36 +01:00
Ross Owen
a5922ce3ea Fixed issue with when XUA_I2S_N_BITS !=32 and CODEC_MASTER == 1 2023-06-06 19:13:25 +01:00
Ross Owen
e24bbe42eb test_i2s_loopback: add testing support for 16bit 2023-06-06 18:31:52 +01:00
Ross Owen
1488ace820 Fixed issue with I2S input when XUA_I2S_N_BITS != 32 2023-06-06 18:10:42 +01:00
Ross Owen
06bd547c69 Set XUA_I2S_N_BITS in test_i2s_loopback 2023-06-06 15:27:00 +01:00
Ross Owen
c2e1a8f17a Fixed issue where sample rate not set in test_i2s_loopback 2023-06-06 15:22:34 +01:00
Ross Owen
58bb074f0d Rationalisation of test_i2s_loopback config building 2023-06-06 14:52:03 +01:00
Ross Owen
c794ee77d5 Update copyright comment 2023-06-06 12:01:46 +01:00
Ross Owen
1cd24963d5 Fixed build issues when CODEC_MASTER set 2023-06-05 14:37:01 +01:00
Ross Owen
b27514fd9a Added XUA_I2S_N_BITS (was N_BITS_I2S) and tidied up usage of define 2023-06-05 14:24:59 +01:00
Ross Owen
5d886487fa Fixed operation when N_BITS_I2S define and small tidies 2023-06-02 16:37:43 +01:00
Ross Owen
1b50abb7a2 Resolve build issues post merge 2023-06-02 14:35:15 +01:00
Ross Owen
d3f0f11d9e Removed example 2023-06-02 14:20:44 +01:00
Ross Owen
897328f9c1 Resolved conflicts merging with develop 2023-06-02 14:18:44 +01:00
Ross Owen
b1fe49aff3 Conflicted merge 2023-06-02 14:06:13 +01:00
Ross Owen
9b104af8cf Merge branch 'develop' into develop 2023-05-17 14:00:38 +01:00
Ross Owen
c469dd6cde Changelog update 2023-05-17 13:58:56 +01:00
Ross Owen
b238196f74 Copyright comment only 2023-05-17 13:55:41 +01:00
Ross Owen
e9586b59d3 Move check for XUA_USB_EN after include of xua.h 2023-05-17 13:48:36 +01:00
Ed
f7b05be05b Merge commit 'a44d5466b5ff4d1d766236d7036daceedef9f2c2' into variable_i2s_bit_width 2021-05-19 10:08:20 +01:00
Ed
fbda8fe92a Merge branch 'develop' of github.com:xmos/lib_xua into variable_i2s_bit_width 2021-05-19 10:02:22 +01:00
Ed
be69d3468e Initial guarding of variable bit I2S modifications 2019-08-23 16:15:47 +01:00
Ed
7cae9c385c Merge remote-tracking branch 'xmos/develop' into variable_i2s_bit_width 2019-08-23 15:34:06 +01:00
Ed Clarke
d9de1f0322 Add clock divider checks and remove debug prints 2019-05-01 10:58:15 +01:00
Ed Clarke
dd21ed0a84 Fix LRCLK alignment when N_BITS < 32 2019-05-01 10:25:22 +01:00
Ed Clarke
d50c9510c6 Fix app so that it loops (working 32b I2S master) 2019-05-01 09:49:36 +01:00
Ed Clarke
b032310302 Initial modifications to extend support to variable bit width master 2019-04-30 18:09:23 +01:00
Ed Clarke
8f9828ea2c Add simple test app for I2S loopback (no USB) 2019-04-30 18:07:15 +01:00
Ed Clarke
50097db00d Merge commit 'c59f9a7c0c628bffc9f9de5a6a4ee55e660d32fe' into variable_i2s_bit_width 2019-04-30 16:01:25 +01:00
Ed Clarke
c59f9a7c0c Make lrcheck mask track the data size 2018-10-15 08:56:57 +01:00
Ed Clarke
7ae04ca313 Enable error checking (helps recover from noise) 2018-10-12 14:26:02 +01:00
Ed Clarke
2562f0eb31 Fix I2S alignment 2018-10-12 14:25:47 +01:00
Ed Clarke
baaef3b749 Initial modifications for 24b I2S slave (without sync error check) 2018-10-10 11:21:44 +01:00
3 changed files with 59 additions and 1 deletions

View File

@@ -197,6 +197,23 @@
#define I2S_DOWNSAMPLE_CHANS_IN I2S_CHANS_ADC #define I2S_DOWNSAMPLE_CHANS_IN I2S_CHANS_ADC
#endif #endif
#ifndef XUA_I2S_DUMMY_SAMPS
#define XUA_I2S_DUMMY_SAMPS (0)
#endif
/**
* @brief Number of bits per channel for I2S/TDM. Supported values: 16/32-bit.
*
* Default: 32 bits
*/
#ifndef XUA_I2S_N_BITS
#define XUA_I2S_N_BITS (32)
#endif
#if (XUA_I2S_N_BITS != 16) && (XUA_I2S_N_BITS != 32)
#error Unsupported value for XUA_I2S_N_BITS (only values 16/32 supported)
#endif
/** /**
* @brief Number of bits per channel for I2S/TDM. Supported values: 16/32-bit. * @brief Number of bits per channel for I2S/TDM. Supported values: 16/32-bit.
* *

View File

@@ -80,6 +80,14 @@ unsigned dsdMode = DSD_MODE_OFF;
#endif #endif
#include "xua_audiohub_st.h" #include "xua_audiohub_st.h"
static inline void PortOutput(buffered out port:32 p, int bits, int value)
{
if(bits == 32)
p <: value;
else
partout(p, bits, value);
}
static inline int HandleSampleClock(int frameCount, buffered _XUA_CLK_DIR port:32 p_lrclk) static inline int HandleSampleClock(int frameCount, buffered _XUA_CLK_DIR port:32 p_lrclk)
{ {
#if CODEC_MASTER #if CODEC_MASTER
@@ -286,6 +294,19 @@ unsigned static AudioHub_MainLoop(chanend ?c_out, chanend ?c_spd_out
else else
#endif #endif
{ {
#if XUA_I2S_DUMMY_SAMPS
if(frameCount == 0)
{
for(int j = 0; j < XUA_I2S_DUMMY_SAMPS; j++)
for(int i = 0; i < I2S_WIRES_DAC; i++)
{
PortOutput(p_i2s_dac[i], XUA_I2S_N_BITS, 0);
}
}
#endif
#if (I2S_CHANS_ADC != 0) #if (I2S_CHANS_ADC != 0)
#if (AUD_TO_USB_RATIO > 1) #if (AUD_TO_USB_RATIO > 1)
if (0 == audioToUsbRatioCounter) if (0 == audioToUsbRatioCounter)
@@ -478,6 +499,25 @@ unsigned static AudioHub_MainLoop(chanend ?c_out, chanend ?c_spd_out
} }
#endif #endif
#if XUA_I2S_DUMMY_SAMPS
if(frameCount == 1)
{
int dummyBits;
for(int j = 0; j < XUA_I2S_DUMMY_SAMPS; j++)
{
for(int i = 0; i < I2S_WIRES_ADC; i++)
{
asm volatile("in %0, res[%1]" : "=r"(dummyBits) : "r"(p_i2s_adc[i]));
if(XUA_I2S_N_BITS)
set_port_shift_count(p_i2s_adc[i], XUA_I2S_N_BITS);
}
asm volatile("in %0, res[%1]" : "=r"(dummyBits) : "r"(p_lrclk));
if(XUA_I2S_N_BITS)
set_port_shift_count(p_lrclk, XUA_I2S_N_BITS);
}
}
#endif
#if (I2S_CHANS_ADC != 0 || I2S_CHANS_DAC != 0) #if (I2S_CHANS_ADC != 0 || I2S_CHANS_DAC != 0)
syncError += HandleSampleClock(frameCount, p_lrclk); syncError += HandleSampleClock(frameCount, p_lrclk);
#endif #endif

View File

@@ -1,6 +1,7 @@
// Copyright 2016-2023 XMOS LIMITED. // Copyright 2016-2023 XMOS LIMITED.
// This Software is subject to the terms of the XMOS Public Licence: Version 1. // This Software is subject to the terms of the XMOS Public Licence: Version 1.
#ifdef SIMULATION #ifdef SIMULATION
#include "xua.h"
#include <platform.h> #include <platform.h>
#include <print.h> #include <print.h>
@@ -45,7 +46,7 @@ void slave_mode_clk_setup(const unsigned samFreq, const unsigned chans_per_frame
const unsigned mclk_freq = 24576000; const unsigned mclk_freq = 24576000;
const unsigned mclk_bclk_ratio = mclk_freq / (chans_per_frame * samFreq * data_bits); const unsigned mclk_bclk_ratio = mclk_freq / (chans_per_frame * samFreq * data_bits);
const unsigned bclk_lrclk_ratio = (chans_per_frame * data_bits); // 48.828Hz LRCLK const unsigned bclk_lrclk_ratio = (chans_per_frame * data_bits + (data_bits * XUA_I2S_DUMMY_SAMPS)); // 48.828Hz LRCLK
//bclk //bclk
configure_clock_src_divide(clk_audio_bclk_gen, p_mclk_gen, mclk_bclk_ratio/2); configure_clock_src_divide(clk_audio_bclk_gen, p_mclk_gen, mclk_bclk_ratio/2);