forked from PAWPAW-Mirror/lib_xua
61 lines
2.1 KiB
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61 lines
2.1 KiB
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I2S/TDM
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=======
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I2S/TDM is typically fundamental to most products and is built into the ``XUA_AudioHub()`` core.
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The defines in :ref:`opt_i2s_defines` effect the I2S implementation.
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.. tabularcolumns:: lp{5cm}l
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.. _opt_i2s_defines:
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.. list-table:: I2S defines
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:header-rows: 1
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:widths: 20 80 20
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* - Define
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- Description
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- Default
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* - ``I2S_CHANS_DAC``
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- The desired number of output channels via I2S (0 for disabled)
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- N/A (Must be defined)
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* - ``I2S_CHANS_ADC``
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- The desired number of input channels via I2S (0 for disabled)
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- N/A (Must be defined)
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* - ``XUA_PCM_FORMAT``
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- Enables either TDM or I2S mode
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- ``XUA_PCM_FORMAT_I2S``
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* - ``CODEC_MASTER``
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- Sets if xCORE is I2S master or slave
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- ``0`` (xCORE is master)
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* - ``XUA_I2S_N_BITS``
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- I2S/TDM word length (16, 24 or 32bit supported)
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- ``32``
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The I2S code expects that the ports required for I2S (master clock, LR-clock, bit-clock and data lines) are be defined in the application XN file in the relevant `Tile``.
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For example::
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<Tile Number="0" Reference="tile[0]">
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<Port Location="XS1_PORT_1A" Name="PORT_MCLK_IN"/>
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<Port Location="XS1_PORT_1B" Name="PORT_I2S_LRCLK"/>
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<Port Location="XS1_PORT_1C" Name="PORT_I2S_BCLK"/>
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<Port Location="XS1_PORT_1D" Name="PORT_I2S_DAC0"/>
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<port Location="XS1_PORT_1E" Name="PORT_I2S_DAC1"/>
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<Port Location="XS1_PORT_1F" Name="PORT_I2S_ADC0"/>
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<Port Location="XS1_PORT_1G" Name="PORT_I2S_ADC1"/>
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</Tile>
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All of the I2S/TDM related ports must be 1-bit ports.
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.. note::
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TDM mode allows 8 channels (rather than 2) to be supplied on each data-line.
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.. note::
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Data output/input is in "I2S" format, rather than, say "left-justified" or "right-justified" formats.
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I2S format specifies a single bit-clock delay after the LR-clock transition before sample-data is driven/received.
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This also applies to TDM mode. TDM support in ADC/DAC hardware is quite varied, an "offset" value may need to be programmed into
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the external device for compatible operation.
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